MC68376BGMAB20 Freescale Semiconductor, MC68376BGMAB20 Datasheet - Page 92

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MC68376BGMAB20

Manufacturer Part Number
MC68376BGMAB20
Description
IC MCU 32BIT 8K ROM 160-QFP
Manufacturer
Freescale Semiconductor
Series
M683xxr
Datasheets

Specifications of MC68376BGMAB20

Core Processor
CPU32
Core Size
32-Bit
Speed
20MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
18
Program Memory Type
ROMless
Ram Size
7.5K x 8
Voltage - Supply (vcc/vdd)
4.75 V ~ 5.25 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
160-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
MC68376BGMAB20
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
5.4 System Protection
5.4.1 Reset Status
5.4.2 Bus Monitor
5-14
MOTOROLA
The system protection block preserves reset status, monitors internal activity, and pro-
vides periodic interrupt generation. Figure 5-6 is a block diagram of the submodule.
The reset status register (RSR) latches internal MCU status during reset. Refer to
5.7.10 Reset Status Register for more information.
The internal bus monitor checks data and size acknowledge (DSACK) or autovector
(AVEC) signal response times during normal bus cycles. The monitor asserts the in-
ternal bus error (BERR) signal when the response time is excessively long.
DSACK and AVEC response times are measured in clock cycles. Maximum allowable
response time can be selected by setting the bus monitor timing (BMT[1:0]) field in the
system protection control register (SYPCR). Table 5-4 shows the periods allowed.
CLOCK
2
9
PRESCALER
Figure 5-6 System Protection Block
SYSTEM INTEGRATION MODULE
SPURIOUS INTERRUPT MONITOR
MODULE CONFIGURATION
RESET STATUS
HALT MONITOR
BUS MONITOR
AND TEST
SOFTWARE WATCHDOG TIMER
PERIODIC INTERRUPT TIMER
RESET REQUEST
BERR
RESET REQUEST
IRQ[7:1]
USER’S MANUAL
MC68336/376
SYS PROTECT BLOCK

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