MC68376BGMAB20 Freescale Semiconductor, MC68376BGMAB20 Datasheet - Page 433

• Manufacturer Part Number: MC68376BGMAB20
• Description: IC MCU 32BIT 8K ROM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: M683xxr

Specifications of MC68376BGMAB20

• Core Processor: CPU32
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Type: ROMless
• Ram Size: 7.5K x 8
• Voltage - Supply (vcc/vdd): 4.75 V ~ 5.25 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 160-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

TRAMTST 12-1, D-82
Transfer
Transistion-sensitivity 5-51
Transmission
Transmit
Transmitter enable (TE) 9-26, D-44
Trigger event 8-30
TSC 5-49
TSM 11-10
T
TST D-9
TSTME 3-8, 3-10, 3-12
TSTMSR D-21
TSTRC D-21
TSTSC D-21
TSYNC D-90
TX
TX/RX D-95
TXD 9-24
TXECTR D-97
TXMODE D-89
TXWARN D-95
Typical ratings (electrical) A-2
UART 11-12
Unimplemented instruction emulation 4-18
Universal asynchronous receiver/transmitter (UART)
User stack pointer (USP) 4-10
Using the TPU Function Library and TPU Emulation
USP 4-10
V (overflow) flag 4-6, D-4
Variable pulse width signal generator (prescaler) 8-25
VBR 4-7, 4-15
V
MC68336/376
USER’S MANUAL
SR
DD
length options 9-17
time 8-13
complete
/receive status (TX/RX) D-95
bit error (BITERR) D-94
complete
data
error status flag (TXWARN) D-95
interrupt enable (TIE) 9-27, D-44
pin configuration control (TXMODE) D-89
RAM 9-7
8-6
Length 13-4
3-8, 5-48, 6-1, 8-6, 12-1
(TC) flag 9-27
interrupt enable (TCIE) 9-27
bit (TC) D-45
interrupt enable (TCIE) D-44
(TXD) pin 9-24
register empty (TDRE) flag 9-27, D-45
11-12
Mode 11-5
–U–
–V–
V
V
V
VECT D-57
Vector base register (VBR) 3-14, 4-7, 4-15, 5-50
V
V
Virtual memory 4-9
Voltage
V
V
V
V
V
V
W bit D-8
WAIT 7-3, D-25
Wait states (WAIT) D-25
WAKE 9-29, D-44
Wake interrupt (WAKEINT) D-96
WAKEINT 13-17, D-96
WAKEMSK 13-17, D-86
Wakeup
Wired-OR
WOMQ D-48
WOMS 9-26, D-43
WOR D-64
Wrap
Wraparound mode 9-6
WREN D-51
Write cycle 5-29
WRTO D-51
X
XTRST (external reset) 5-41
DDA
DDA/2
DDSYN
IH
IL
PP
RH
RL
SS
SSA
STBY
8-8
8-8
3-8, 8-5, 8-15, D-37
ramp time 5-48
controlled oscillator (VCO)
reference pins 8-5
C-2
3-8, 8-6, 12-2
address mark (WAKE) 9-29, D-44
functions 9-2
interrupt mask (WAKEMSK) D-86
mode
mode (WOR) D-64
enable (WREN) D-51
to (WRTO) D-51
master 9-19
slave 9-20
flowchart 5-29
timing diagram A-12
(extend) flag 4-6, D-4
bit in SYNCR D-8
3-8, 8-5, 8-15, D-37
3-8, 8-6
3-8, 8-6
3-8, 6-2, 12-1, 12-2
8-15
3-8, 5-48
frequency ramp time 5-48
for QSPI pins (WOMQ) D-48
for SCI pins (WOMS) 9-26, D-43
–W–
–X–
MOTOROLA
I-17