MC68376BGMAB20 Freescale Semiconductor, MC68376BGMAB20 Datasheet - Page 366

• Manufacturer Part Number: MC68376BGMAB20
• Description: IC MCU 32BIT 8K ROM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: M683xxr

Specifications of MC68376BGMAB20

• Core Processor: CPU32
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Type: ROMless
• Ram Size: 7.5K x 8
• Voltage - Supply (vcc/vdd): 4.75 V ~ 5.25 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 160-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

D.6.11 QSPI Control Register 0
SPCR0 — QSPI Control Register 0
MSTR — Master/Slave Mode Select
WOMQ — Wired-OR Mode for QSPI Pins
D-48
MOTOROLA
RESET:
MSTR
15
0
DDRQS determines the direction of the TXD pin only when the SCI transmitter is dis-
abled. When the SCI transmitter is enabled, the TXD pin is an output.
SPCR0 contains parameters for configuring the QSPI and enabling various modes of
operation. The CPU32 has read/write access to SPCR0, but the QSM has read access
only. SPCR0 must be initialized before QSPI operation begins. Writing a new value to
SPCR0 while the QSPI is enabled disrupts operation.
0 = QSPI is a slave device.
1 = QSPI is the system master.
0 = Pins designated for output by DDRQS operate in normal mode.
1 = Pins designated for output by DDRQS operate in open-drain mode.
WOMQ
14
0
NOTES:
PCS0/SS
QSM Pin
PCS[1:3]
MISO
MOSI
SCK
TXD
1. PQS2 is a digital I/O pin unless the SPI is enabled (SPE set in SPCR1), in which case it
2. PQS7 is a digital I/O pin unless the SCI transmitter is enabled (TE set in SCCR1), in
RXD
becomes the QSPI serial clock SCK.
which case it becomes the SCI serial data output TXD.
13
0
1
2
Table D-33 Effect of DDRQS on QSM Pin Function
12
0
BITS[3:0]
Master
Master
Master
Master
Master
Mode
Slave
Slave
Slave
Slave
Slave
—
—
11
0
10
0
DDRQS Bit
DDQS[4:6]
DDQS0
DDQS1
DDQS2
DDQS3
DDQS7
None
REGISTER SUMMARY
CPOL
9
0
CPHA
8
1
Bit State
NA
—
—
X
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
7
0
6
0
Serial data output from QSPI
Serial data output from QSPI
Assertion causes mode fault
Serial data output from SCI
Disables chip-select output
Disables slave select Input
Serial data input to QSPI
Serial data input to QSPI
Clock output from QSPI
QSPI slave select input
Serial data input to SCI
5
0
Disables data output
Disables data output
Clock input to QSPI
Disables data input
Disables data input
Chip-select output
Chip-select output
Pin Function
Inactive
Inactive
4
0
SPBR[7:0]
3
0
USER’S MANUAL
2
1
MC68336/376
$YFFC18
1
0
0
0