MC68376BGMAB20 Freescale Semiconductor, MC68376BGMAB20 Datasheet - Page 8

• Manufacturer Part Number: MC68376BGMAB20
• Description: IC MCU 32BIT 8K ROM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: M683xxr

Specifications of MC68376BGMAB20

• Core Processor: CPU32
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Type: ROMless
• Ram Size: 7.5K x 8
• Voltage - Supply (vcc/vdd): 4.75 V ~ 5.25 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 160-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Paragraph
8.5
8.6
8.6.1
8.6.2
8.6.3
8.6.4
8.7
8.8
8.8.1
8.8.2
8.9
8.10
8.11
8.11.1
8.11.1.1
8.11.2
8.11.3
8.11.4
8.11.5
8.12
8.12.1
8.12.2
8.12.3
8.12.3.1
8.12.3.2
8.12.3.3
8.12.4
8.12.5
8.12.6
8.12.6.1
8.12.6.2
8.12.6.3
8.12.6.4
8.12.7
8.12.8
8.13
8.13.1
8.13.2
8.13.3
8.13.4
viii
MOTOROLA
QADC Bus Interface .................................................................................. 8-6
Module Configuration ................................................................................ 8-6
Test Register ............................................................................................. 8-8
General-Purpose I/O Port Operation ......................................................... 8-8
External Multiplexing Operation .............................................................. 8-10
Analog Input Channels ............................................................................ 8-12
Analog Subsystem .................................................................................. 8-12
Digital Control Subsystem ....................................................................... 8-16
Interrupts ................................................................................................. 8-32
Low-Power Stop Mode ...................................................................... 8-6
Freeze Mode ..................................................................................... 8-7
Supervisor/Unrestricted Address Space ........................................... 8-7
Interrupt Arbitration Priority ............................................................... 8-8
Port Data Register ............................................................................. 8-9
Port Data Direction Register .............................................................. 8-9
Conversion Cycle Times ................................................................. 8-13
Front-End Analog Multiplexer .......................................................... 8-15
Digital to Analog Converter Array .................................................... 8-15
Comparator ..................................................................................... 8-16
Successive Approximation Register ................................................ 8-16
Queue Priority ................................................................................. 8-16
Queue Boundary Conditions ........................................................... 8-19
Scan Modes .................................................................................... 8-20
QADC Clock (QCLK) Generation .................................................... 8-24
Periodic/Interval Timer .................................................................... 8-27
Control and Status Registers .......................................................... 8-28
Conversion Command Word Table ................................................. 8-28
Result Word Table ........................................................................... 8-31
Interrupt Sources ............................................................................. 8-32
Interrupt Register ............................................................................. 8-32
Interrupt Vectors .............................................................................. 8-33
Initializing the QADC for Interrupt Driven Operation ....................... 8-34
Amplifier Bypass Mode Conversion Timing ............................ 8-14
Disabled Mode and Reserved Mode ....................................... 8-20
Single-Scan Modes ................................................................. 8-20
Continuous-Scan Modes ......................................................... 8-22
Control Register 0 (QACR0) ................................................... 8-28
Control Register 1 (QACR1) ................................................... 8-28
Control Register 2 (QACR2) ................................................... 8-28
Status Register (QASR) .......................................................... 8-28
SECTION 9 QUEUED SERIAL MODULE
TABLE OF CONTENTS
(Continued)
Title
USER’S MANUAL
MC68336/376
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