MC68376BGMAB20 Freescale Semiconductor, MC68376BGMAB20 Datasheet - Page 125

• Manufacturer Part Number: MC68376BGMAB20
• Description: IC MCU 32BIT 8K ROM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: M683xxr

Specifications of MC68376BGMAB20

• Core Processor: CPU32
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Type: ROMless
• Ram Size: 7.5K x 8
• Voltage - Supply (vcc/vdd): 4.75 V ~ 5.25 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 160-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

5.7.5.2 Reset States of Pins Assigned to Other MCU Modules
5.7.6 Reset Timing
MC68336/376
USER’S MANUAL
As a rule, module pins that are assigned to general-purpose I/O ports go into a high-
impedance state following reset. Other pin states are determined by individual module
control register settings. Refer to sections concerning modules for details. However,
during power-on reset, module port pins may be in an indeterminate state for a short
period. Refer to 5.7.7 Power-On Reset for more information.
The RESET input must be asserted for a specified minimum period for reset to occur.
External RESET assertion can be delayed internally for a period equal to the longest
bus cycle time (or the bus monitor time-out period) in order to protect write cycles from
being aborted by reset. While RESET is asserted, SIM pins are either in an inactive,
high-impedance state or are driven to their inactive states.
CS[9:6]/ADDR[22:19]/PC[6:3]
CS[5:3]/FC[2:0]/PC[2:0]
CS10/ADDR23/ECLK
IRQ[7:1]/PF[7:1]
SIZ[1:0]/PE[7:6]
MODCLK/PF0
DSACK0/PE0
DSACK1/PE1
CS2/BGACK
TSTME/TSC
ADDR[18:0]
DATA[15:0]
AVEC/PE2
RMC/PE3
CSBOOT
CLKOUT
CS1/BG
AS/PE5
CS0/BR
DS/PE4
RESET
Pin(s)
BERR
HALT
R/W
Table 5-17 SIM Pin Reset States
While RESET
Mode Select
Mode select
Mode select
SYSTEM INTEGRATION MODULE
Pin State
Asserted
Asserted
High-Z
High-Z
High-Z
High-Z
Output
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
V
V
V
V
V
V
V
DD
DD
DD
DD
DD
DD
DD
Pin Function
ADDR[18:0]
DATA[15:0]
MODCLK
CSBOOT
CLKOUT
DSACK0
DSACK1
IRQ[7:1]
SIZ[1:0]
CS[9:6]
CS[5:3]
RESET
AVEC
BERR
CS10
HALT
RMC
CS1
CS2
CS0
R/W
TSC
Default Function
AS
DS
Pin State After RESET Released
Pin State
Unknown
Unknown
Output
Output
Output
Output
Output
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
V
V
V
V
V
V
V
DD
DD
DD
DD
DD
DD
SS
Pin Function
ADDR[22:19]
ADDR[18:0]
DATA[15:0]
CSBOOT
CLKOUT
ADDR23
BGACK
RESET
FC[2:0]
PF[7:1]
PE[7:6]
BERR
HALT
Alternate Function
R/W
TSC
PE5
PE2
PE4
PE0
PE1
PF0
PE3
BG
BR
Pin State
Unknown
Unknown
Unknown
Unknown
Output
Output
MOTOROLA
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
V
V
DD
SS
5-47