MC68376BGMAB20 Freescale Semiconductor, MC68376BGMAB20 Datasheet - Page 263

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MC68376BGMAB20

Manufacturer Part Number
MC68376BGMAB20
Description
IC MCU 32BIT 8K ROM 160-QFP
Manufacturer
Freescale Semiconductor
Series
M683xxr
Datasheets

Specifications of MC68376BGMAB20

Core Processor
CPU32
Core Size
32-Bit
Speed
20MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
18
Program Memory Type
ROMless
Ram Size
7.5K x 8
Voltage - Supply (vcc/vdd)
4.75 V ~ 5.25 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
160-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
MC68376BGMAB20
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
13.4.2 Receive Mask Registers
MC68336/376
USER’S MANUAL
If a message transfer between the message buffer and a serial message buffer is in
progress when the control/status word is read, the BUSY status will be indicated in the
code field, and the lock will not be activated.
The user can release the lock on a message buffer in one of two ways. Reading the
control/status word of another message buffer will lock that buffer, releasing the pre-
viously locked buffer. A global release can also be performed on any locked message
buffer by reading the free-running timer.
Once a lock is released, any message transfers between an SMB and a message buff-
er which was delayed due to that buffer being locked will take place. For more details
on the message buffer locking mechanism, and the effects on message buffer opera-
tion, refer to 13.5 TouCAN Operation.
The receive mask registers are used as acceptance masks for received frame IDs.
The following masks are defined:
The value of the mask registers should not be changed during normal operation. If the
mask register data is changed after the masked identifier of a received message is
matched to a locked message buffer, that message will be transferred into that mes-
sage buffer once it is unlocked, regardless of whether that message’s masked identi-
fier still matches the receive buffer identifier. Table 13-6 shows mask bit values.
Table 13-7 shows mask examples for normal and extended messages. Refer to AP-
PENDIX D REGISTER SUMMARY for more information on RX mask registers.
• A global mask, used for receive buffers 0-13
• Two separate masks for buffers 14 and 15
Mask Bit
Table 13-6 Receive Mask Register Bit Values
0
1
CAN 2.0B CONTROLLER MODULE (TouCAN)
The corresponding incoming ID bit is “don’t care”.
The corresponding ID bit is checked against the incoming ID
bit to see if a match exists.
Values
MOTOROLA
13-7

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