MC68376BGMAB20 Freescale Semiconductor, MC68376BGMAB20 Datasheet - Page 227

• Manufacturer Part Number: MC68376BGMAB20
• Description: IC MCU 32BIT 8K ROM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: M683xxr

Specifications of MC68376BGMAB20

• Core Processor: CPU32
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Type: ROMless
• Ram Size: 7.5K x 8
• Voltage - Supply (vcc/vdd): 4.75 V ~ 5.25 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 160-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

MC68336/376
USER’S MANUAL
ator, though internally, channel B has two data registers (B1 and B2). DASM operating
mode determines which register is software accessible. Refer to Table 10-3.
Register contents are always transferred automatically at the correct time so that the
minimum pulse (measured or generated) is just one time base bus count. The A and
B data registers are always read/write registers, accessible via the CTM4 submodule
bus.
The CTM4 has four DASMs. Figure 10-5 shows a block diagram of the DASM.
Output Pulse Width
Modulation Mode
Output Compare
(IPWM, IPM, IC)
(OCA, OCAB)
SELECT
Input Capture
BUS
(OPWM)
Mode
MODE3 MODE2
CONTROL REGISTER BITS
16-BIT COMPARATOR A
16-BIT COMPARATOR B
16-BIT REGISTER B2
16-BIT REGISTER B1
16-BIT REGISTER A
BSL
Table 10-3 Channel B Data Register Access
REGISTER B
MODE1 MODE0
Registers A and B2 are used to hold the captured values. In these modes,
the B1 register is used as a temporary latch for channel B.
Registers A and B2 are used to define the output pulse. Register B1 is not
used in these modes.
Registers A and B1 are used as primary registers and hidden register B2 is
used as a double buffer for channel B.
Figure 10-5 DASM Block Diagram
CONFIGURABLE TIMER MODULE 4
2 TIME BASE BUSES
SUBMODULE BUS
FORCA
FLIP-FLOP
Data Register
OUTPUT
FLAG
FORCB
CONTROL REGISTER BITS
IL2
INTERRUPT
CONTROL
OUTPUT
BUFFER
DETECT
EDPOL
EDGE
WOR
IL1
IL0
IARB3
I/O PIN
IN
TBBA
TBBB
MOTOROLA
CTM DASM BLOCK
10-11