MC68376BGMAB20 Freescale Semiconductor, MC68376BGMAB20 Datasheet - Page 377

• Manufacturer Part Number: MC68376BGMAB20
• Description: IC MCU 32BIT 8K ROM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: M683xxr

Specifications of MC68376BGMAB20

• Core Processor: CPU32
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Type: ROMless
• Ram Size: 7.5K x 8
• Voltage - Supply (vcc/vdd): 4.75 V ~ 5.25 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 160-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

DIV23 — Divide By 2/Divide By 3
PSEL[1:0] — Prescaler Division Ratio Select
D.7.5 CPSM Test Register
CPTR — CPSM Test Register
D.7.6 FCSM Status/Interrupt/Control Register
FCSMSIC — FCSM Status/Interrupt/Control Register
COF — Counter Overflow Flag
MC68336/376
USER’S MANUAL
COF
15
U
RESET:
The DIV23 bit is a read/write control bit that selects the division ratio of the first pres-
caler stage. It may be changed at any time.
This bit field selects the division ratio of the programmable prescaler output signal
PCLK6. Refer to Table D-38.
Used only during factory test.
This flag indicates whether or not a counter overflow has occurred. An overflow is de-
fined as the transition of the counter from $FFFF to $0000. If the IL[2:0] field is non-
zero, an interrupt request is generated when the COF bit is set.
This flag bit is set only by hardware and cleared by software or system reset. To clear
the flag, first read the bit as a one, then write a zero to the bit.
0 = First prescaler stage divides by two.
1 = First prescaler stage divides by three.
0 = Counter overflow has not occurred
1 = Counter overflow has occurred
14
0
IL[2:0]
13
0
DIV23
Prescaler Control Bits
0
0
0
0
1
1
1
1
Table D-38 Prescaler Division Ratio Select Field
12
0
PSEL1 PSEL0 PCLK1 PCLK2 PCLK3 PCLK4 PCLK5 PCLK6
0
0
1
1
0
0
1
1
IARB3
11
0
USED
NOT
10
0
1
0
1
0
1
0
1
DRVA
REGISTER SUMMARY
9
0
2
2
2
2
3
3
3
3
DRVB
8
0
4
4
4
4
6
6
6
6
Prescaler Division Ratio
IN
U
7
12
12
12
12
8
8
8
8
6
16
16
16
16
24
24
24
24
NOT USED
5
4
32
32
32
32
48
48
48
48
3
128
256
512
192
384
768
64
96
2
0
$YFF40A
MOTOROLA
$YFF460
CLK[2:0]
1
0
D-59
0
0