MC68376BGMAB20 Freescale Semiconductor, MC68376BGMAB20 Datasheet - Page 216

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MC68376BGMAB20

Manufacturer Part Number
MC68376BGMAB20
Description
IC MCU 32BIT 8K ROM 160-QFP
Manufacturer
Freescale Semiconductor
Series
M683xxr
Datasheets

Specifications of MC68376BGMAB20

Core Processor
CPU32
Core Size
32-Bit
Speed
20MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
18
Program Memory Type
ROMless
Ram Size
7.5K x 8
Voltage - Supply (vcc/vdd)
4.75 V ~ 5.25 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
160-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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Part Number:
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8.13.4 Initializing the QADC for Interrupt Driven Operation
8-34
MOTOROLA
The following steps are required to ensure proper operation of QADC interrupts:
1. Assign the QADC a unique non-zero IARB value. The IARB field is located in
2. Set the interrupt request levels for queue 1 and queue 2 in the IRLQ1 and
3. Set the six high-order bits of the eight-bit IVB field in QADCINT. The QADC pro-
QADCMCR. The lowest priority IARB value is %0001, and the highest priority
IARB value is %1111.
IRLQ2 fields in QADCINT. Level %001 is the lowest priority interrupt request,
and level %111 is the highest priority request.
vides the two low-order vector bits to identify one of four QADC interrupt re-
quests. The vector number for each QADC interrupt source corresponds to a
specific vector in the exception vector table. Each vector in the exception vector
table points to the beginning address of an exception handler routine.
QUEUED ANALOG-TO-DIGITAL CONVERTER MODULE
USER’S MANUAL
MC68336/376

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