MC68376BGMAB20 Freescale Semiconductor, MC68376BGMAB20 Datasheet - Page 386

• Manufacturer Part Number: MC68376BGMAB20
• Description: IC MCU 32BIT 8K ROM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: M683xxr

Specifications of MC68376BGMAB20

• Core Processor: CPU32
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Type: ROMless
• Ram Size: 7.5K x 8
• Voltage - Supply (vcc/vdd): 4.75 V ~ 5.25 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 160-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

D.7.14 PWM Status/Interrupt/Control Register
PWM5SIC — PWM5 Status/Interrupt/Control Register
PWM6SIC — PWM6 Status/Interrupt/Control Register
PWM7SIC — PWM7 Status/Interrupt/Control Register
PWM8SIC — PWM8 Status/Interrupt/Control Register
FLAG — Period Completion Status
D-68
MOTOROLA
FLAG
15
0
RESET:
This status bit indicates when the PWM output period has been completed.
The FLAG bit is set each time a PWM period is completed. Whenever the PWM is en-
abled, the FLAG bit is set immediately to indicate that the contents of the buffer regis-
ters PWMA2 and PWMB2 have been updated, and that the period using these new
values has started. It also indicates that the user accessible period and pulse width
registers PWMA1 and PWMB1 can be loaded with values for the next PWM period.
Once set, the FLAG bit remains set and is not affected by any subsequent period com-
pletions, until it is cleared.
Only software can clear the FLAG bit. To clear FLAG, first read the bit as one then
write a zero to the bit. Writing a one to FLAG has no effect. When the PWM is disabled,
FLAG remains cleared.
OPWM
OCAB
IPWM
Mode
OCB
IPM
DIS
IC
0 = PWM period is not complete.
1 = PWM period is complete.
14
0
IL[2:0]
DASMB can be accessed to prepare a value for a subsequent mode selection. In this mode, register
B1 is accessed in order to prepare a value for the OPWM mode. Unused register B2 is hidden and
cannot be read, but is written with the same value as register B1 is written.
DASMB contains the captured value corresponding to the trailing edge of the measured pulse. In this
mode, register B2 is accessed. Buffer register B1 is hidden and cannot be accessed.
DASMB contains the captured value corresponding to the most recently detected user-specified ris-
ing or falling edge. In this mode, register B2 is accessed. Buffer register B1 is hidden and cannot be
accessed.
DASMB contains the captured value corresponding to the most recently detected user-specified ris-
ing or falling edge. In this mode, register B2 is accessed. Buffer register B1 is hidden and cannot be
accessed.
DASMB is loaded with the value corresponding to the trailing edge of the pulse to be generated. Writ-
ing to DASMB in the OCB and OCAB modes also enables the corresponding channel B comparator
until the next successful comparison. In this mode, register B2 is accessed. Buffer register B1 is hid-
den and cannot be accessed.
DASMB is loaded with the value corresponding to the trailing edge of the pulse to be generated. Writ-
ing to DASMB in the OCB and OCAB modes also enables the corresponding channel B comparator
until the next successful comparison. In this mode, register B2 is accessed. Buffer register B1 is hid-
den and cannot be accessed.
DASMB is loaded with the value corresponding to the trailing edge of the PWM pulse to be generat-
ed. In this mode, register B1 is accessed. Buffer register B2 is hidden and cannot be accessed.
13
0
12
0
IARB3
11
0
Table D-48 DASMB Operations
10
NOT USED
REGISTER SUMMARY
9
8
DASMB Operation
PIN
7
0
USED
NOT
6
LOAD
5
0
POL
4
0
EN
3
0
USER’S MANUAL
2
0
MC68336/376
$YFF428
$YFF430
$YFF438
$YFF440
CLK[2:0]
1
0
0
0