MC68376BGMAB20 Freescale Semiconductor, MC68376BGMAB20 Datasheet - Page 380

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MC68376BGMAB20

Manufacturer Part Number
MC68376BGMAB20
Description
IC MCU 32BIT 8K ROM 160-QFP
Manufacturer
Freescale Semiconductor
Series
M683xxr
Datasheets

Specifications of MC68376BGMAB20

Core Processor
CPU32
Core Size
32-Bit
Speed
20MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
18
Program Memory Type
ROMless
Ram Size
7.5K x 8
Voltage - Supply (vcc/vdd)
4.75 V ~ 5.25 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
160-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68376BGMAB20
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
IN2 — Clock Input Pin Status
IN1 — Modulus Load Input Pin Status
EDGEN, EDGEP — Modulus Load Edge Sensitivity Bits
CLK[2:0] — Counter Clock Select Field
D-62
MOTOROLA
This read-only bit reflects the logic state of the clock input pin CTM2C. Writing to this
bit has no effect nor does reset.
This read-only bit reflects the logic state of the modulus load input pin CTD9. Writing
to this bit has no effect nor does reset.
These read/write control bits select which edge on CTD9 triggers the modulus load
input. Refer to Table D-42.
These read/write control bits select one of the six CPSM clock signals (PCLK[1:6]) or
one of two external conditions on CTM2C to clock the modulus counter. The maximum
frequency of an external clock signal is f
Two time base buses should not be driven at the same time.
CLK2
0
0
0
0
1
1
1
1
Table D-42 Modulus Load Edge Sensitivity Bits
DRVA
0
0
1
1
EDGEN
CLK1
Table D-43 Counter Clock Select Field
Table D-41 Drive Time Base Bus Field
0
0
1
1
0
0
1
1
0
0
1
1
DRVB
0
1
0
1
EDGEP
CLK0
REGISTER SUMMARY
0
1
0
1
0
1
0
1
0
1
0
1
Neither time base bus A nor bus B is driven
Both time base bus A and bus B are driven
WARNING
IN1 Edge Detector Sensitivity
sys
Positive and negative edge
Time base bus B is driven
Time base bus A is driven
Free Running Counter Clock Source
/4. Refer to Table D-43.
Negative edge only
CTM2C input pin, negative edge
CTM2C input pin, positive edge
Positive edge only
Prescaler output 6 (/64 to /768)
Prescaler output 4 (/16 or /24)
Prescaler output 5 (/32 or /48)
Prescaler output 3 (/8 or /12)
Prescaler output 1 (/2 or /3)
Prescaler output 2 (/4 or /6)
Bus Selected
None
USER’S MANUAL
MC68336/376

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