MC68376BGMAB20 Freescale Semiconductor, MC68376BGMAB20 Datasheet - Page 323

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MC68376BGMAB20

Manufacturer Part Number
MC68376BGMAB20
Description
IC MCU 32BIT 8K ROM 160-QFP
Manufacturer
Freescale Semiconductor
Series
M683xxr
Datasheets

Specifications of MC68376BGMAB20

Core Processor
CPU32
Core Size
32-Bit
Speed
20MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
18
Program Memory Type
ROMless
Ram Size
7.5K x 8
Voltage - Supply (vcc/vdd)
4.75 V ~ 5.25 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
160-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68376BGMAB20
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
D.2 System Integration Module
MC68336/376
USER’S MANUAL
Table D-3 shows the SIM address map. The column labeled “Access” indicates the
privilege level at which the CPU32 must be operating to access the register. A
designation of “S” indicates that supervisor mode is required. A designation of “S/U”
indicates that the register can be programmed for either supervisor mode access or
unrestricted access.
Access
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
Address
$YFFA0A
$YFFA0C
$YFFA0E
$YFFA1A
$YFFA1C
$YFFA1E
$YFFA2A
$YFFA2C
$YFFA2E
$YFFA3A
$YFFA3C
$YFFA3E
$YFFA4A
$YFFA4C
$YFFA4E
$YFFA00
$YFFA02
$YFFA04
$YFFA06
$YFFA08
$YFFA10
$YFFA12
$YFFA14
$YFFA16
$YFFA18
$YFFA20
$YFFA22
$YFFA24
$YFFA26
$YFFA28
$YFFA30
$YFFA32
$YFFA34
$YFFA36
$YFFA38
$YFFA40
$YFFA42
$YFFA44
$YFFA46
$YFFA48
1
15
Table D-3 SIM Address Map
REGISTER SUMMARY
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Clock Synthesizer Control Register (SYNCR)
SIM Module Configuration Register (SIMCR)
Periodic Interrupt Control Register (PICR)
Test Module Repetition Counter (TSTRC)
Periodic Interrupt Timing Register (PITR)
Test Module Master Shift A (TSTMSRA)
Test Module Master Shift B (TSTMSRB)
Chip-Select Pin Assignment (CSPAR0)
Chip-Select Pin Assignment (CSPAR1)
Chip-Select Option Boot (CSORBT)
Chip-Select Base Boot (CSBARBT)
Test Module Shift Count (TSTSC)
Test Module Distributed (DREG)
SIM Test Register E (SIMTRE)
Chip-Select Option 0 (CSOR0)
Chip-Select Base 0 (CSBAR0)
Test Module Control (CREG)
SIM Test Register (SIMTR)
8
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
7
System Protection Control (SYPCR)
Port E Pin Assignment (PEPAR)
Port F Pin Assignment (PFPAR)
Port E Data Direction (DDRE)
Port F Data Direction (DDRF)
Reset Status Register (RSR)
Software Service (SWSR)
Port E Data (PORTE0)
Port E Data (PORTE1)
Port F Data (PORTF0)
Port F Data (PORTF1)
Port C Data (PORTC)
0
MOTOROLA
D-5

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