MC68376BGMAB20 Freescale Semiconductor, MC68376BGMAB20 Datasheet - Page 187

• Manufacturer Part Number: MC68376BGMAB20
• Description: IC MCU 32BIT 8K ROM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: M683xxr

Specifications of MC68376BGMAB20

• Core Processor: CPU32
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Type: ROMless
• Ram Size: 7.5K x 8
• Voltage - Supply (vcc/vdd): 4.75 V ~ 5.25 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 160-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

8.4.3 External Trigger Input Pins
8.4.4 Multiplexed Address Output Pins
8.4.5 Multiplexed Analog Input Pins
8.4.6 Voltage Reference Pins
MC68336/376
USER’S MANUAL
The QADC has two external trigger pins (ETRIG[2:1]). The external trigger pins share
two multifunction port A pins (PQA[4:3]), which are normally used as analog channel
input pins. Each of the two external trigger pins is associated with one of the scan
queues. When a queue is in external trigger mode, the corresponding external trigger
pin is configured as a digital input and the software programmed input/output direction
for that pin is ignored. Refer to D.5.5 Port Data Direction Register for more informa-
tion.
In non-multiplexed mode, the 16 channel pins are connected to an internal multiplexer
which routes the analog signals into the A/D converter.
In externally multiplexed mode, the QADC allows automatic channel selection through
up to four external 1-of-8 multiplexer chips. The QADC provides a 3-bit multiplexed ad-
dress output to the external mux chips to allow selection of one of eight inputs. The
multiplexed address output signals MA[2:0] can be used as multiplex address output
bits or as general-purpose I/O.
MA[2:0] are used as the address inputs for up to four 1-of-8 multiplexer chips (for ex-
ample, the MC14051 and the MC74HC4051). Since MA[2:0] are digital outputs in mul-
tiplexed mode, the software programmed input/output direction for these pins in
DDRQA is ignored.
In externally multiplexed mode, four of the port B pins are redefined to each represent
a group of eight input channels. Refer to Table 8-1.
The analog output of each external multiplexer chip is connected to one of the AN[w,
x, y, z] inputs in order to convert a channel selected by the MA[2:0] multiplexed ad-
dress outputs.
V
arating the reference inputs from the power supply pins allows for additional external
filtering, which increases reference voltage precision and stability, and subsequently
contributes to a higher degree of conversion accuracy. Refer to Tables A-11 and A-
12 for more information.
RH
and V
RL
are the dedicated input pins for the high and low reference voltages. Sep-
Multiplexed Analog Input
QUEUED ANALOG-TO-DIGITAL CONVERTER MODULE
Table 8-1 Multiplexed Analog Input Channels
ANw
ANx
ANy
ANz
Even numbered channels from 0 to 14
Odd numbered channels from 1 to 15
Even channels from 16 to 30
Odd channels from 17 to 31
Channels
MOTOROLA
8-5