MC68376BGMAB20 Freescale Semiconductor, MC68376BGMAB20 Datasheet - Page 63

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MC68376BGMAB20

Manufacturer Part Number
MC68376BGMAB20
Description
IC MCU 32BIT 8K ROM 160-QFP
Manufacturer
Freescale Semiconductor
Series
M683xxr
Datasheets

Specifications of MC68376BGMAB20

Core Processor
CPU32
Core Size
32-Bit
Speed
20MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
18
Program Memory Type
ROMless
Ram Size
7.5K x 8
Voltage - Supply (vcc/vdd)
4.75 V ~ 5.25 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
160-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68376BGMAB20
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
MC68336/376
USER’S MANUAL
ANDI to SR1
ANDI to CCR
DIVS/DIVU
CMPM
ADDQ
BCHG
BGND
CMPA
ABCD
ADDA
ADDX
CMP2
BCLR
BKPT
BSET
CHK2
BTST
CMPI
ADDI
ANDI
DBcc
CMP
ADD
AND
ASR
BRA
BSR
CHK
CLR
ASL
Bcc
1
# <data>, <ea>
# <data>, <ea>
# <data>, CCR
# <data>, <ea>
# <data>, <ea>
# <data>, <ea>
# <data>, <ea>
# <data>, <ea>
#<data>, <ea>
# <data>, SR
(An) , (An)
# <data>, Dn
# <data>, Dn
(An),
(An),
Dn, <ea>
<ea>, Dn
<ea>, Dn
Dn, <ea>
Dn, <ea>
Dn, <ea>
Dn, <ea>
Dn, <ea>
<ea>, Dn
<ea>, Rn
<ea>, Dn
<ea>, Rn
<ea>, Dn
<ea>, An
<ea>, An
# <data>
Dn, label
Dn, Dn
Dn, Dn
Dn, Dn
Dn, Dn
<ea>
<ea>
<ea>
none
label
label
label
Table 4-2 Instruction Set Summary
(An)
(An)
CENTRAL PROCESSOR UNIT
32/16
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
16, 32
16, 32
16, 32
8, 32
8, 32
8, 32
8, 32
none
none
8, 32
8, 32
8, 32
8, 32
16
16
16
16
8
8
8
16 : 16
Source
Source
Source
Immediate data
Immediate data
Source
Source Destination
Data Destination
Source CCR
Source SR
If condition true, then PC
0
If background mode enabled, then enter background
mode, else format/vector
PC
If breakpoint cycle acknowledged, then execute
returned operation word, else trap as illegal instruction
PC
1
SP
If Dn < 0 or Dn > (ea), then CHK exception
If Rn < lower bound or Rn > upper bound, then
CHK exception
0
(Destination
(Destination
(Destination
(Destination
Lower bound
If condition false, then Dn
if Dn
Destination / Source
(signed or unsigned)
bit number of destination
bit number of destination
bit number of destination
bit number of destination
bit of destination
bit of destination
Destination
4
d
10
( 1), then PC
X/C
(SSP); SR
Destination
Destination
Destination
SP; PC
PC
Destination
Source), CCR shows results
Source), CCR shows results
Data), CCR shows results
Source), CCR shows results
Rn
SR
CCR
Destination
Destination
Upper bound, CCR shows result
(SP); PC
Destination
10
X
d
Destination
Destination
(SSP); (vector)
Destination
Destination
d
X
1
Destination
PC
(SSP);
Z
Z;
Z;
Z
PC
Destination
d
PC;
Destination
Destination
bit of destination
PC
MOTOROLA
X/C
PC
0
4-11

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