MC68376BGMAB20 Freescale Semiconductor, MC68376BGMAB20 Datasheet - Page 402

• Manufacturer Part Number: MC68376BGMAB20
• Description: IC MCU 32BIT 8K ROM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: M683xxr

Specifications of MC68376BGMAB20

• Core Processor: CPU32
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Type: ROMless
• Ram Size: 7.5K x 8
• Voltage - Supply (vcc/vdd): 4.75 V ~ 5.25 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 160-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

D.10 TouCAN Module
D-84
MOTOROLA
The TouCAN is used only in the MC68376. Table D-59 shows the TouCAN address
map. The column labeled “Access” indicates the privilege level at which the CPU32
must be operating to access the register. A designation of “S” indicates that supervisor
mode is required. A designation of “S/U” indicates that the register can be pro-
grammed for either supervisor mode access or unrestricted access.
TouCAN module address space is split, with 128 bytes starting at the base address,
and an extra 256 bytes starting at the base address +128. The upper 256 are fully used
for the message buffer structures. Of the lower 128 bytes, only part is occupied by var-
ious registers. Registers with bits marked as “reserved” should always be written as
logic 0.
NOTES:
Access
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
1. Y = M111, where M is the logic state of the module mapping (MM) bit in SIMCR.
—
—
S
S
S
Address
$YFF08A
$YFF09A
$YFF0A0
$YFF0A2
$YFF0A4
$YFF0A6
$YFF080
$YFF082
$YFF084
$YFF086
$YFF088
$YFF090
$YFF092
$YFF094
$YFF096
$YFF098
—
—
1
Table D-59 TouCAN Address Map
15
Receive Error Counter (RXECTR)
Control Register 0 (CANCTRL0)
Prescaler Divider Register
REGISTER SUMMARY
TouCAN Module Configuration Register (CANMCR)
(PRESDIV)
TouCAN Test Configuration Register (CANTCR)
Receive Buffer 14 Mask High (RX14MSKHI)
Receive Buffer 14 Mask Low (RX14MSKLO)
Receive Buffer 15 Mask High (RX15MSKHI)
Receive Buffer 15 Mask Low (RX15MSKLO)
Receive Global Mask Low (RXGMSKLO)
Receive Global Mask High (RXGMSKHI)
Free-Running Timer Register (TIMER)
TouCAN Interrupt Register (CANICR)
Error and Status Register (ESTAT)
Interrupt Masks (IMASK)
Interrupt Flags (IFLAG)
Reserved
Reserved
8 7
Transmit Error Counter (TXECTR)
Control Register 1 (CANCTRL1)
Control Register 2 (CANCTRL2)
USER’S MANUAL
MC68336/376
0