HD64F2623FA20J Renesas Electronics America, HD64F2623FA20J Datasheet - Page 740

• Manufacturer Part Number: HD64F2623FA20J
• Description: IC H8S MCU FLASH 256K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2623FA20J

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 21A Power-Down Modes [H8S/2623 Group]
21A.7.2 Hardware Standby Mode Timing
Figure 21A.4 shows an example of hardware standby mode timing.
When the STBY pin is driven low after the RES pin has been driven low, a transition is made to
hardware standby mode. Hardware standby mode is cleared by driving the STBY pin high, waiting
for the oscillation stabilization time, then changing the RES pin from low to high.
21A.8
Output of the clock can be controlled by means of the PSTOP bit in SCKCR, and DDR for the
corresponding port. When the PSTOP bit is set to 1, the clock stops at the end of the bus cycle,
and output goes high. clock output is enabled when the PSTOP bit is cleared to 0. When DDR
for the corresponding port is cleared to 0, clock output is disabled and input port mode is set.
Table 21A.5 shows the state of the pin in each processing state.
Table 21A.5
DDR
PSTOP
Hardware standby mode
Software standby
Sleep mode
High-speed mode, medium-speed
mode
Rev. 5.00 Jan 10, 2006 page 714 of 1042
REJ09B0275-0500
Oscillator
RES
STBY
Clock Output Disabling Function
Pin State in Each Processing State
Figure 21A.4 Hardware Standby Mode Timing
0
—
High impedance
High impedance
High impedance
High impedance
1
0
High impedance
Fixed high
output
output
Oscillation
stabilization
time
1
1
High impedance
Fixed high
Fixed high
Fixed high
exception
handling
Reset