HD64F2623FA20J Renesas Electronics America, HD64F2623FA20J Datasheet - Page 648

• Manufacturer Part Number: HD64F2623FA20J
• Description: IC H8S MCU FLASH 256K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2623FA20J

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 18 RAM
18.1.2
The on-chip RAM is controlled by SYSCR. Table 18.1 shows the address and initial value of
SYSCR.
Table 18.1 RAM Register
Name
System control register
Note:
18.2
18.2.1
The on-chip RAM is enabled or disabled by the RAME bit in SYSCR. For details of other bits in
SYSCR, see section 3.2.2, System Control Register (SYSCR).
Bit 0—RAM Enable (RAME): Enables or disables the on-chip RAM. The RAME bit is
initialized when the reset state is released. It is not initialized in software standby mode.
Note: When the DTC is used, the RAME bit must be set to 1.
Bit 0
RAME
0
1
Rev. 5.00 Jan 10, 2006 page 622 of 1042
REJ09B0275-0500
Bit
Initial value
R/W
* Lower 16 bits of the address.
Register Configuration
Register Descriptions
System Control Register (SYSCR)
Description
On-chip RAM is disabled
On-chip RAM is enabled
:
:
:
MACS
R/W
7
0
—
—
6
0
Abbreviation
SYSCR
INTM1
R/W
5
0
INTM0
R/W
4
0
R/W
R/W
NMIEG
R/W
3
0
H'01
Initial Value
R/W
—
2
0
—
—
1
0
(Initial value)
Address *
H'FDE5
RAME
R/W
0
1