HD64F2623FA20J Renesas Electronics America, HD64F2623FA20J Datasheet - Page 521

• Manufacturer Part Number: HD64F2623FA20J
• Description: IC H8S MCU FLASH 256K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2623FA20J

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

14.2
Registers added with the Smart Card interface and bits for which the function changes are
described here.
14.2.1
SCMR is an 8-bit readable/writable register that selects the Smart Card interface function.
SCMR is initialized to H'F2 by a reset and in standby mode.
Bits 7 to 4—Reserved: These bits are always read as 1 and cannot be modified.
Bit 3—Smart Card Data Transfer Direction (SDIR): Selects the serial/parallel conversion
format.
Bit 2—Smart Card Data Invert (SINV): Specifies inversion of the data logic level. This
function is used together with the SDIR bit for communication with an inverse convention card.
The SINV bit does not affect the logic level of the parity bit. For parity-related setting procedures,
see section 14.3.4, Register Settings.
Bit 3
SDIR
0
1
Bit
Initial value :
R/W
Register Descriptions
Smart Card Mode Register (SCMR)
Description
TDR contents are transmitted LSB-first
Receive data is stored in RDR LSB-first
TDR contents are transmitted MSB-first
Receive data is stored in RDR MSB-first
:
:
—
—
7
1
—
—
6
1
—
—
5
1
—
—
4
1
Rev. 5.00 Jan 10, 2006 page 495 of 1042
SDIR
R/W
3
0
Section 14 Smart Card Interface
SINV
R/W
2
0
REJ09B0275-0500
—
—
1
1
(Initial value)
SMIF
R/W
0
0