HD64F2623FA20J Renesas Electronics America, HD64F2623FA20J Datasheet - Page 643

IC H8S MCU FLASH 256K 100-QFP

HD64F2623FA20J

Manufacturer Part Number
HD64F2623FA20J
Description
IC H8S MCU FLASH 256K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2623FA20J

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Bit 6—D/A Output Enable 0 (DAOE0): Controls D/A conversion and analog output.
Bit 5—D/A Enable (DAE): Controls D/A conversion, together with bits DAOE0 and DAOE1.
When the DAE bit is cleared to 0, D/A conversion is controlled independently in channels 2 and 3.
When the DAE bit is set to 1, D/A conversion is controlled together in channels 2 and 3.
Output of the conversion result is always controlled independently by bits DAOE0 and DAOE1.
If the chip enters software standby mode while D/A conversion is enabled, the D/A output is
retained and the analog power supply current is the same as the analog power supply current
during D/A conversion. If it is necessary to reduce the analog power supply current in software
standby mode, D/A output should be disabled by clearing both the DAOE0 bit and the DAOE1 bit
to 0.
Bits 4 to 0—Reserved: These bits are always read as 1, and cannot be modified.
Bit 6
DAOE0
0
1
Bit 7
DAOE1
0
0
Bit 6
DAOE0
0
1
0
1
Description
DA2 analog output is disabled
Channel 2 D/A conversion and DA2 analog output are enabled
Bit 5
DAE
*
0
1
0
1
*
Section 17 D/A Converter [Provided in the H8S/2626 Group only]
Description
D/A conversion is disabled in channels 2 and 3 (Initial value)
D/A conversion is enabled in channel 2
D/A conversion is disabled in channel 3
D/A conversion is enabled in channels 2 and 3
D/A conversion is disabled in channel 2
D/A conversion is enabled in channel 3
D/A conversion is enabled in channels 2 and 3
D/A conversion is enabled in channels 2 and 3
Rev. 5.00 Jan 10, 2006 page 617 of 1042
REJ09B0275-0500
(Initial value)
*: Don’t care

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