HD64F2623FA20J Renesas Electronics America, HD64F2623FA20J Datasheet - Page 275

IC H8S MCU FLASH 256K 100-QFP

HD64F2623FA20J

Manufacturer Part Number
HD64F2623FA20J
Description
IC H8S MCU FLASH 256K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2623FA20J

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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In modes 4 to 6, if a pin is in the input state in accordance with the settings in PFCR, in the TPU’s
TIOR, and in DDR, setting the corresponding PBPCR bit to 1 turns on the MOS input pull-up for
that pin.
In mode 7, if a pin is in the input state in accordance with the settings in the TPU’s TIOR and in
DDR, setting the corresponding PBPCR bit to 1 turns on the MOS input pull-up for that pin.
PBPCR is initialized to H'00 by a reset, and in hardware standby mode. It retains its prior state in
software standby mode.
Port B Open Drain Control Register (PBODR)
PBODR is an 8-bit readable/writable register that controls the PMOS on/off state for each port B
pin (PB7 to PB0).
When pins are not address outputs in accordance with the setting of bits AE3 to AE0 in PFCR,
setting a PBODR bit makes the corresponding port B pin an NMOS open-drain output, while
clearing the bit to 0 makes the pin a CMOS output.
PBODR is initialized to H'00 by a reset, and in hardware standby mode. It retains its prior state in
software standby mode.
9.6.3
Port B pins also function as TPU input/output pins (TIOCA3, TIOCB3, TIOCC3, TIOCD3,
TIOCA4, TIOCB4, TIOCA5, TIOCB5) and address bus output pins (A15 to A8). Port B pin
functions are shown in table 9.10.
Bit
Initial value :
R/W
Pin Functions
:
:
PB7ODR PB6ODR PB5ODR PB4ODR PB3ODR PB2ODR PB1ODR PB0ODR
R/W
7
0
R/W
6
0
R/W
5
0
R/W
4
0
Rev. 5.00 Jan 10, 2006 page 249 of 1042
R/W
3
0
R/W
2
0
Section 9 I/O Ports
REJ09B0275-0500
R/W
1
0
R/W
0
0

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