HD64F2623FA20J Renesas Electronics America, HD64F2623FA20J Datasheet - Page 126

• Manufacturer Part Number: HD64F2623FA20J
• Description: IC H8S MCU FLASH 256K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2623FA20J

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 5 Interrupt Controller
5.2
5.2.1
SYSCR is an 8-bit readable/writable register that selects the interrupt control mode, and the
detected edge for NMI.
Only bits 5 to 3 are described here; for details of the other bits, see section 3.2.2, System Control
Register (SYSCR).
SYSCR is initialized to H'01 by a reset and in hardware standby mode. SYSCR is not initialized in
software standby mode.
Bits 5 and 4—Interrupt Control Mode 1 and 0 (INTM1, INTM0): These bits select one of two
interrupt control modes for the interrupt controller.
Bit 5
INTM1
0
1
Bit 3—NMI Edge Select (NMIEG): Selects the input edge for the NMI pin.
Bit 3
NMIEG
0
1
Rev. 5.00 Jan 10, 2006 page 100 of 1042
REJ09B0275-0500
Bit
Initial value
R/W
Register Descriptions
System Control Register (SYSCR)
Bit 4
INTM0
0
1
0
1
Description
Interrupt request generated at falling edge of NMI input
Interrupt request generated at rising edge of NMI input
:
:
:
MACS
R/W
Interrupt
Control Mode
0
—
2
—
7
0
—
—
6
0
INTM1
Description
Interrupts are controlled by I bit
Setting prohibited
Interrupts are controlled by bits I2 to I0, and IPR
Setting prohibited
R/W
5
0
INTM0
R/W
4
0
NMIEG
R/W
3
0
R/W
—
2
0
—
—
1
0
(Initial value)
(Initial value)
RAME
R/W
0
1