HD64F2623FA20J Renesas Electronics America, HD64F2623FA20J Datasheet - Page 340

• Manufacturer Part Number: HD64F2623FA20J
• Description: IC H8S MCU FLASH 256K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2623FA20J

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 10 16-Bit Timer Pulse Unit (TPU)
10.2.4
The TIER registers are 8-bit registers that control enabling or disabling of interrupt requests for
each channel. The TPU has six TIER registers, one for each channel. The TIER registers are
initialized to H'40 by a reset, and in hardware standby mode.
Bit 7—A/D Conversion Start Request Enable (TTGE): Enables or disables generation of A/D
conversion start requests by TGRA input capture/compare match.
Bit 7
TTGE
0
1
Bit 6—Reserved: This bit is always read as 1 and cannot be modified.
Rev. 5.00 Jan 10, 2006 page 314 of 1042
REJ09B0275-0500
Channel 0: TIER0
Channel 3: TIER3
Bit
Initial value :
R/W
Channel 1: TIER1
Channel 2: TIER2
Channel 4: TIER4
Channel 5: TIER5
Bit
Initial value :
R/W
Timer Interrupt Enable Register (TIER)
Description
A/D conversion start request generation disabled
A/D conversion start request generation enabled
:
:
:
:
TTGE
TTGE
R/W
R/W
7
0
7
0
—
—
—
—
6
1
6
1
TCIEU
R/W
—
—
5
0
5
0
TCIEV
TCIEV
R/W
R/W
4
0
4
0
TGIED
R/W
—
—
3
0
3
0
TGIEC
R/W
—
—
2
0
2
0
TGIEB
TGIEB
R/W
R/W
1
0
1
0
(Initial value)
TGIEA
TGIEA
R/W
R/W
0
0
0
0