HD64F2623FA20J Renesas Electronics America, HD64F2623FA20J Datasheet - Page 679

IC H8S MCU FLASH 256K 100-QFP

HD64F2623FA20J

Manufacturer Part Number
HD64F2623FA20J
Description
IC H8S MCU FLASH 256K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2623FA20J

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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5. The period for which the P1 bit in FLMCR1 is set (the write pulse width) should be changed
6. The program/program-verify flowchart for the H8S/2626 and H8S/2623 is shown in figure
Legend:
(D): Source data of bits on which programming is executed
(X): Source data of bits on which reprogramming is executed
(D)
0
1
b. After write pulse application, a verify-read is performed in program-verify mode, and
c. If programming of other bits is incomplete in the 128 bytes, reprogramming processing
according to the degree of progress through the program/program-verify procedure. For
detailed wait time specifications, see section 22.6, Flash Memory Characteristics.
19.11.
To cover the points noted above, bits on which reprogramming processing is to be executed,
and bits on which additional programming is to be executed, must be determined as shown
below.
Since reprogram data and additional-programming data vary according to the progress of the
programming procedure, it is recommended that the following data storage areas (128 bytes
each) be provided in RAM.
Reprogram Data Computation Table
number of loops in reprogramming processing is guaranteed not to exceed the maximum
value of the maximum programming count (N).
programming is judged to have been completed for bits read as 0.
should be executed. If a bit for which programming has been judged to be completed is
read as 1 in a subsequent verify-read, a write pulse should again be applied to that bit.
Result of Verify-Read
after Write Pulse
Application (V)
0
1
0
1
(X)
Result of Operation
1
0
1
Comments
Programming completed: reprogramming
processing not to be executed
Programming incomplete: reprogramming
processing to be executed
Still in erased state: no action
Rev. 5.00 Jan 10, 2006 page 653 of 1042
Section 19 ROM (Preliminary)
REJ09B0275-0500

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