HD64F2623FA20J Renesas Electronics America, HD64F2623FA20J Datasheet - Page 729

IC H8S MCU FLASH 256K 100-QFP

HD64F2623FA20J

Manufacturer Part Number
HD64F2623FA20J
Description
IC H8S MCU FLASH 256K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2623FA20J

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2623FA20J
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD64F2623FA20J
Manufacturer:
HIT
Quantity:
1 000
Part Number:
HD64F2623FA20J
Manufacturer:
HITACHI/日立
Quantity:
20 000
Part Number:
HD64F2623FA20JV
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Bits 6 to 4—Standby Timer Select 2 to 0 (STS2 to STS0): These bits select the MCU wait time
for clock stabilization when shifting to high-speed mode or medium-speed mode by using a
specific interrupt or command to cancel software standby mode. With a quartz oscillator (table
21A.4), select a wait time of 8ms (oscillation stabilization time) or more, depending on the
operating frequency. With an external clock, there are no specific wait requirements.
Bit 3—Output Port Enable (OPE): This bit specifies whether the output of the address bus and
bus control signals (AS, RD, HWR, LWR) is retained or set to high-impedance state in the
software standby mode.
Bits 2 to 0—Reserved: These bits always return 0 when read, and cannot be written to.
Bit 7
SSBY
0
1
Bit 6
STS2
0
1
Bit 3
OPE
0
1
Bit 5
STS1
0
1
0
1
Description
Shifts to sleep mode when the SLEEP instruction is executed in high-speed
mode or medium-speed mode.
Shifts to software standby mode when the SLEEP instruction is executed in high-
speed mode or medium-speed mode.
Description
In software standby mode, address bus and bus control signals are high-impedance.
In software standby mode, the output state of the address bus and bus control signals
is retained.
Bit 4
STS0
0
1
0
1
0
1
0
1
Description
Standby time = 8192 states
Standby time = 16384 states
Standby time = 32768 states
Standby time = 65536 states
Standby time = 131072 states
Standby time = 262144 states
Reserved
Standby time = 16 states
Section 21A Power-Down Modes [H8S/2623 Group]
Rev. 5.00 Jan 10, 2006 page 703 of 1042
REJ09B0275-0500
(Initial value)
(Initial value)
(Initial value)

Related parts for HD64F2623FA20J