HD64F2623FA20J Renesas Electronics America, HD64F2623FA20J Datasheet - Page 286

IC H8S MCU FLASH 256K 100-QFP

HD64F2623FA20J

Manufacturer Part Number
HD64F2623FA20J
Description
IC H8S MCU FLASH 256K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2623FA20J

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Section 9 I/O Ports
9.7.2
Table 9.12 shows the port C register configuration.
Table 9.12 Port C Registers
Name
Port C data direction register
Port C data register
Port C register
Port C MOS pull-up control register
Port C open-drain control register
Note:
Port C Data Direction Register (PCDDR)
PCDDR is an 8-bit write-only register, the individual bits of which specify input or output for the
pins of port C. PCDDR cannot be read; if it is, an undefined value will be read.
PCDDR is initialized to H'00 by a reset, and in hardware standby mode. It retains its prior state in
software standby mode. As the SCI is initialized, pin states are determined by the PCDDR and
PCDR specifications. The OPE bit in SBYCR is used to select whether the address output pins
retain their output state or become high-impedance when a transition is made to software standby
mode.
Rev. 5.00 Jan 10, 2006 page 260 of 1042
REJ09B0275-0500
Bit
Initial value :
R/W
Modes 4 and 5
The corresponding port C pins are address outputs irrespective of the value of the PCDDR bits.
Mode 6
Setting a PCDDR bit to 1 makes the corresponding port C pin an address output, while
clearing the bit to 0 makes the pin an input port.
Mode 7
Setting a PCDDR bit to 1 makes the corresponding port C pin an output port, while clearing
the bit to 0 makes the pin an input port.
* Lower 16 bits of the address.
Register Configuration
:
:
PC7DDR PC6DDR PC5DDR PC4DDR PC3DDR PC2DDR PC1DDR PC0DDR
W
7
0
W
6
0
PCDDR
PCPCR
PCODR
Abbreviation
PCDR
PORTC
W
5
0
W
4
0
R/W
W
R/W
R
R/W
R/W
W
3
0
Initial Value
H'00
H'00
Undefined
H'00
H'00
W
2
0
W
1
0
Address *
H'FE3B
H'FF0B
H'FFBB
H'FE42
H'FE49
W
0
0

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