HD64F2623FA20J Renesas Electronics America, HD64F2623FA20J Datasheet - Page 474

IC H8S MCU FLASH 256K 100-QFP

HD64F2623FA20J

Manufacturer Part Number
HD64F2623FA20J
Description
IC H8S MCU FLASH 256K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2623FA20J

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2623FA20J
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD64F2623FA20J
Manufacturer:
HIT
Quantity:
1 000
Part Number:
HD64F2623FA20J
Manufacturer:
HITACHI/日立
Quantity:
20 000
Part Number:
HD64F2623FA20JV
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Section 13 Serial Communication Interface (SCI)
Bit 2—Smart Card Data Invert (SINV): Specifies inversion of the data logic level. The SINV
bit does not affect the logic level of the parity bit(s): parity bit inversion requires inversion of the
O/E bit in SMR.
Bit 2
SINV
0
1
Bit 1—Reserved: This bit is always read as 1 and cannot be modified.
Bit 0—Smart Card Interface Mode Select (SMIF): When the smart card interface operates as a
normal SCI, 0 should be written in this bit.
Bit 0
SMIF
0
1
13.2.10 Module Stop Control Register B (MSTPCRB)
MSTPCRB is 8-bit readable/writable registers that perform module stop mode control.
When one of bits MSTPB7 to MSTPB5 is set to 1, SCI0, SCI1, or SCI2, respectively, stops
operation at the end of the bus cycle, and enters module stop mode. For details, see sections
21A.5, 21B.5, Module Stop Mode.
MSTPCRB is initialized to H'FF by a reset and in hardware standby mode. They are not
initialized in software standby mode.
Rev. 5.00 Jan 10, 2006 page 448 of 1042
REJ09B0275-0500
MSTPCRB
Bit
Initial value
R/W
Description
TDR contents are transmitted without modification
Receive data is stored in RDR without modification
TDR contents are inverted before being transmitted
Receive data is stored in RDR in inverted form
Description
Operates as normal SCI (smart card interface function disabled)
Smart card interface function enabled
:
:
:
MSTPB7
R/W
7
1
MSTPB6
R/W
6
1
MSTPB5
R/W
5
1
MSTPB4
R/W
4
1
MSTPB3
R/W
3
1
MSTPB2
R/W
2
1
MSTPB1
R/W
1
1
(Initial value)
(Initial value)
MSTPB0
R/W
0
1

Related parts for HD64F2623FA20J