HD64F2623FA20J Renesas Electronics America, HD64F2623FA20J Datasheet - Page 435

• Manufacturer Part Number: HD64F2623FA20J
• Description: IC H8S MCU FLASH 256K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2623FA20J

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

RSTCSR is initialized to H'1F by a reset signal from the RES pin, but not by the WDT internal
reset signal caused by overflows.
Note: * RSTCSR is write-protected by a password to prevent accidental overwriting. For
Bit 7—Watchdog Overflow Flag (WOVF): Indicates that TCNT has overflowed (changed from
H'FF to H'00) during watchdog timer operation. This bit is not set in interval timer mode.
Bit 6—Reset Enable (RSTE): Specifies whether or not a reset signal is generated in the chip if
TCNT overflows during watchdog timer operation.
Note:
Bit 5—Reset Select (RSTS): Selects the type of internal reset generated if TCNT overflows
during watchdog timer operation.
For details of the types of reset, see section 4, Exception Handling.
Bits 4 to 0—Reserved: These bits are always read as 1 and cannot be modified.
Bit 7
WOVF
0
1
Bit 6
RSTE
0
1
Bit 5
RSTS
0
1
* The modules within the chip are not reset, but TCNT and TCSR within the WDT are
details see section 12.2.5, Notes on Register Access.
reset.
Description
[Clearing condition]
Cleared by reading TCSR when WOVF = 1, then writing 0 to WOVF
[Setting condition]
Set when TCNT overflows (changed from H'FF to H'00) during watchdog timer
operation
Description
Reset signal is not generated if TCNT overflows *
Reset signal is generated if TCNT overflows
Description
Power-on reset
Setting prohibited
Rev. 5.00 Jan 10, 2006 page 409 of 1042
Section 12 Watchdog Timer
REJ09B0275-0500
(Initial value)
(Initial value)
(Initial value)