HD64F2623FA20J Renesas Electronics America, HD64F2623FA20J Datasheet - Page 665

IC H8S MCU FLASH 256K 100-QFP

HD64F2623FA20J

Manufacturer Part Number
HD64F2623FA20J
Description
IC H8S MCU FLASH 256K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2623FA20J

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Table 19.4 Flash Memory Erase Blocks
19.5.5
RAMER specifies the area of flash memory to be overlapped with part of RAM when emulating
real-time flash memory programming. RAMER initialized to H'00 by a reset and in hardware
standby mode. It is not initialized in software standby mode. RAMER settings should be made in
user mode or user program mode.
Flash memory area divisions are shown in table 19.5. To ensure correct operation of the emulation
function, the ROM for which RAM emulation is performed should not be accessed immediately
after this register has been modified. Normal execution of an access immediately after register
modification is not guaranteed.
Bits 7 and 6—Reserved: These bits always read 0.
Bits 5 and 4—Reserved: Only 0 may be written to these bits.
Block (Size)
EB0 (4 kbytes)
EB1 (4 kbytes)
EB2 (4 kbytes)
EB3 (4 kbytes)
EB4 (4 kbytes)
EB5 (4 kbytes)
EB6 (4 kbytes)
EB7 (4 kbytes)
EB8 (32 kbytes)
EB9 (64 kbytes)
EB10 (64 kbytes)
EB11 (64 kbytes)
Initial value:
RAM Emulation Register (RAMER)
R/W:
Bit:
R
7
0
R
6
0
Addresses
H'000000–H'000FFF
H'001000–H'001FFF
H'002000–H'002FFF
H'003000–H'003FFF
H'004000–H'004FFF
H'005000–H'005FFF
H'006000–H'006FFF
H'007000–H'007FFF
H'008000–H'00FFFF
H'010000–H'01FFFF
H'020000–H'02FFFF
H'030000–H'03FFFF
R/W
5
0
R/W
4
0
Rev. 5.00 Jan 10, 2006 page 639 of 1042
RAMS
R/W
3
0
Section 19 ROM (Preliminary)
RAM2
R/W
2
0
REJ09B0275-0500
RAM1
R/W
1
0
RAM0
R/W
0
0

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