HD64F2623FA20J Renesas Electronics America, HD64F2623FA20J Datasheet - Page 404

IC H8S MCU FLASH 256K 100-QFP

HD64F2623FA20J

Manufacturer Part Number
HD64F2623FA20J
Description
IC H8S MCU FLASH 256K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2623FA20J

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Section 11 Programmable Pulse Generator (PPG)
NDERL Bits 7 to 0—Next Data Enable 7 to 0 (NDER7 to NDER0): These bits enable or
disable pulse output on a bit-by-bit basis.
Bits 7 to 0
NDER7 to NDER0
0
1
11.2.2
Note:
PODRH and PODRL are 8-bit readable/writable registers that store output data for use in pulse
output. However, the H8S/2626 Group and H8S/2623 Group have no pins corresponding to
PODRL.
Rev. 5.00 Jan 10, 2006 page 378 of 1042
REJ09B0275-0500
PODRH
Bit
Initial value :
R/W
PODRL
Bit
Initial value :
R/W
* A bit that has been set for pulse output by NDER is read-only.
Output Data Registers H and L (PODRH, PODRL)
:
:
:
:
POD15
R/(W) *
R/(W) *
POD7
7
0
7
0
Description
Pulse outputs PO7 to PO0 are disabled (NDR7 to NDR0 are not
transferred to POD7 to POD0)
Pulse outputs PO7 to PO0 are enabled (NDR7 to NDR0 are transferred to
POD7 to POD0)
POD14
R/(W) *
R/(W) *
POD6
6
0
6
0
POD13
R/(W) *
R/(W) *
POD5
5
0
5
0
POD12
R/(W) *
R/(W) *
POD4
4
0
4
0
POD11
R/(W) *
R/(W) *
POD3
3
0
3
0
POD10
R/(W) *
R/(W) *
POD2
2
0
2
0
R/(W) *
R/(W) *
POD9
POD1
1
0
1
0
(Initial value)
R/(W) *
R/(W) *
POD8
POD0
0
0
0
0

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