HD64F2623FA20J Renesas Electronics America, HD64F2623FA20J Datasheet - Page 23

• Manufacturer Part Number: HD64F2623FA20J
• Description: IC H8S MCU FLASH 256K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2623FA20J

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

19.8 Protection .......................................................................................................................... 658
19.9 Flash Memory Emulation in RAM ................................................................................... 662
19.10 Interrupt Handling when Programming/Erasing Flash Memory....................................... 664
19.11 Flash Memory Programmer Mode .................................................................................... 664
19.12 Flash Memory and Power-Down States............................................................................ 679
19.13 Flash Memory Programming and Erasing Precautions..................................................... 680
19.14 Note on Switching from F-ZTAT Version to Mask ROM Version .................................. 685
Section 20 Clock Pulse Generator
20.1 Overview........................................................................................................................... 687
20.2 Register Descriptions ........................................................................................................ 689
20.3 Oscillator........................................................................................................................... 691
20.4 PLL Circuit ....................................................................................................................... 696
20.5 Medium-Speed Clock Divider .......................................................................................... 696
20.6 Bus Master Clock Selection Circuit .................................................................................. 697
20.7 Subclock Oscillator (H8S/2626 Group Only) ................................................................... 697
20.8 Subclock Waveform Shaping Circuit (H8S/2626 Group Only)........................................ 698
20.9 Note on Crystal Resonator ................................................................................................ 698
19.7.1 Program Mode ..................................................................................................... 651
19.7.2 Program-Verify Mode.......................................................................................... 652
19.7.3 Erase Mode .......................................................................................................... 656
19.7.4 Erase-Verify Mode .............................................................................................. 656
19.8.1 Hardware Protection ............................................................................................ 658
19.8.2 Software Protection.............................................................................................. 659
19.8.3 Error Protection.................................................................................................... 660
19.11.1 Socket Adapter Pin Correspondence Diagram..................................................... 665
19.11.2 Programmer Mode Operation .............................................................................. 667
19.11.3 Memory Read Mode ............................................................................................ 668
19.11.4 Auto-Program Mode ............................................................................................ 672
19.11.5 Auto-Erase Mode................................................................................................. 674
19.11.6 Status Read Mode ................................................................................................ 676
19.11.7 Status Polling ....................................................................................................... 677
19.11.8 Programmer Mode Transition Time .................................................................... 677
19.11.9 Notes on Memory Programming.......................................................................... 678
19.12.1 Note on Power-Down States ................................................................................ 679
20.1.1 Block Diagram ..................................................................................................... 688
20.1.2 Register Configuration......................................................................................... 688
20.2.1 System Clock Control Register (SCKCR) ........................................................... 689
20.2.2 Low-Power Control Register (LPWRCR) ........................................................... 690
20.3.1 Connecting a Crystal Resonator........................................................................... 691
20.3.2 External Clock Input ............................................................................................ 694
.................................................................................. 687
Rev. 5.00 Jan 10, 2006 page xxi of xxiv