HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 801
HD6417720BP133BV
Manufacturer Part Number
HD6417720BP133BV
Description
SH3-DSP, WITH USB AND LCDC, PB-F
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.R8A77210C133BAV.pdf
(1478 pages)
Specifications of HD6417720BP133BV
Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
133MHz
Connectivity
FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
117
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
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SH7720 Group, SH7721 Group
Each interrupt mask flag is able to prohibit interrupt generation of each interrupt that indicated in
interrupt status flag. Every mask bits are automatically set when TE or RE bit are modified to 1.
TFEM and THEM are 1 when TE = 0. RFFM and RHFM are 1 when RE = 0. Each mask bit is
reset as 1.
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010
Bit
15 to 12 ⎯
11
10
9
8
7 to 4
3
TFEM
RFFM
THEM
RHFM
⎯
TFE
Bit Name
Initial Value
All 0
1
1
1
1
All 0
1
R/W
R
R/W
R/W
R/W
R/W
R
R
Description
Reserved
These bits are always read as 0. The write
value should always be 0.
Transmit FIFO Empty Interrupt Mask
0: TFE Interrupt enable
1: TFE interrupt masked
Receive FIFO Full Interrupt Mask
0: RFF Interrupt enable
1: RFF Interrupt masked
Threshold of Transmit FIFO Empty Interrupt
Mask
0: THE Interrupt enable
1: THE Interrupt masked
Threshold of Receive FIFO Full Interrupt Mask
0: RHF Interrupt enable
1: RHF Interrupt masked
Reserved
These bits are always read as 0. The write
value should always be 0.
Transmit FIFO Empty Interrupt
0: Normal state
[Clearing condition]
•
1: TxFIFO empty interrupt
[Setting conditions]
•
•
•
Data are written into FIFO
Reset
No effective data in area of FIFO
TE bit (ACTR1) is set to 0 (TFEM bit is set
to 1)
Section 22 Analog Front End Interface (AFEIF)
Page 741 of 1414
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