HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 596

• Manufacturer Part Number: HD6417720BP133BV
• Description: SH3-DSP, WITH USB AND LCDC, PB-F
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417720BP133BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 117
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 15 16-Bit Timer Pulse Unit (TPU)
15.4.3
Buffer operation, enables TGRC and TGRD to be used as buffer registers.
Table 15.6 shows the register combinations used in buffer operation.
Table 15.6 Register Combinations in Buffer Operation
When a compare match occurs, the value in the buffer register for the corresponding channel is
transferred to the timer general register. For update timing from a buffer register, rewriting on
compare match occurrence or on counter cleaning can be selected.
This operation is illustrated in figure 15.8.
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Timer General Register
TGRA
TGRB
Buffer Operation
Buffer register
BFWT bit
Counter cleaning signal
Figure 15.8 Compare Match Buffer Operation
Compare match signal
Timer general
register
Buffer Register
TGRC
TGRD
Comparator
SH7720 Group, SH7721 Group
R01UH0083EJ0400 Rev. 4.00
TCNT
Sep 21, 2010