HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 118

SH3-DSP, WITH USB AND LCDC, PB-F

HD6417720BP133BV

Manufacturer Part Number
HD6417720BP133BV
Description
SH3-DSP, WITH USB AND LCDC, PB-F
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417720BP133BV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
133MHz
Connectivity
FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
117
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Section 2 CPU
Page 58 of 1414
Addressing
Mode
PC-relative with
displacement
PC-relative
Instruction
Format
@(disp:8,
PC)
disp:8
disp:12
Rn
Effective address is PC with 12-bit displacement
Effective Address Calculation Method
Effective address is PC with 8-bit displacement disp
added. After disp is zero-extended, it is multiplied
by 2 (word) or 4 (longword), according to the
operand size. With a longword operand, the lower 2
bits of PC are masked.
Effective address is PC with 8-bit displacement disp
added after being sign-extended and multiplied by
2.
disp added after being sign-extended and multiplied
by 2
Effective address is sum of PC and Rn.
(zero-extended)
(sign-extended)
(sign-extended)
H'FFFFFFFC
disp
2/4
disp
disp
Rn
PC
PC
PC
PC
2
2
&
×
×
×
+
*
+
+
+
*: With longword operand
PC + disp × 2
H'FFFFFFFC
PC + disp × 2
PC + disp × 2
+ disp × 4
PC + Rn
PC &
or
SH7720 Group, SH7721 Group
R01UH0083EJ0400 Rev. 4.00
Calculation Formula
Word: PC + disp × 2
Longword:
PC&H'FFFFFFFC
+ disp × 4
PC + disp × 2
PC + disp × 2
PC + Rn
Sep 21, 2010

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