HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 707

SH3-DSP, WITH USB AND LCDC, PB-F

HD6417720BP133BV

Manufacturer Part Number
HD6417720BP133BV
Description
SH3-DSP, WITH USB AND LCDC, PB-F
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417720BP133BV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
133MHz
Connectivity
FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
117
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
SH7720 Group, SH7721 Group
The I
functions. The register configuration that controls the I
configuration, however.
Figure 20.1 shows a block diagram of the I
Figure 20.2 shows an example of I/O pin connections to external circuits.
20.1
• Continuous transmission/reception
• Start and stop conditions generated automatically in master mode
• Selection of acknowledge output levels when receiving
• Automatic loading of acknowledge bit when transmitting
• Bit synchronization/wait function
• Six interrupt sources
• Direct bus drive
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010
Since the shift register, transmit data register, and receive data register are independent from
each other, the continuous transmission/reception can be performed.
In master mode, the state of SCL is monitored per bit, and the timing is synchronized
automatically.
If transmission/reception is not yet possible, set the SCL to low until preparations are
completed.
Transmit data empty (including slave-address match), transmit end, receive data full (including
slave-address match), arbitration lost, NACK detection, and stop condition detection
Two pins, SCL and SDA pins, function as NMOS open-drain outputs when the bus drive
function is selected.
2
C bus interface supports and provides a subset of the Philips I
Features
Section 20 I
2
2
C Bus Interface (IIC)
C bus interface.
2
C bus differs partly from the Philips
2
C bus (inter-IC bus) interface
Section 20 I
2
C Bus Interface (IIC)
IFIIC10A_000020020200
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