HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 669

SH3-DSP, WITH USB AND LCDC, PB-F

HD6417720BP133BV

Manufacturer Part Number
HD6417720BP133BV
Description
SH3-DSP, WITH USB AND LCDC, PB-F
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417720BP133BV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
133MHz
Connectivity
FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
117
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
SH7720 Group, SH7721 Group
18.3.9
SCBRR is an eight-bit readable/writable register that, together with the baud rate generator clock
source selected by the CKS1 and CKS0 bits in the serial mode register (SCSMR), determines the
serial transmit/receive bit rate.
The SCBRR setting is calculated as follows:
Asynchronous Mode:
1. When sampling rate is 1/16
2. When sampling rate is 1/5
3. When sampling rate is 1/11
4. When sampling rate is 1/13
5. When sampling rate is 1/27
Synchronous Mode:
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010
Bit
7 to 0
Bit Name
SCBRD7 to
SCBRD0
N =
N =
N =
N =
N =
N =
Bit Rate Register (SCBRR)
32 × 2
10 × 2
22 × 2
26 × 2
54 × 2
4 × 2
2n-1
2n-1
2n-1
2n-1
2n-1
2n-1
Initial value
H'FF
× B
× B
× B
× B
× B
× B
× 10
× 10
× 10
× 10
× 10
× 10
6
6
6
6
6
6
- 1
- 1
- 1
- 1
- 1
- 1
R/W
R/W
Description
Bit Rate Set
Section 18 Serial Communication Interface with FIFO (SCIF)
Page 609 of 1414

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