HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 681

SH3-DSP, WITH USB AND LCDC, PB-F

HD6417720BP133BV

Manufacturer Part Number
HD6417720BP133BV
Description
SH3-DSP, WITH USB AND LCDC, PB-F
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417720BP133BV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
133MHz
Connectivity
FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
117
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
SH7720 Group, SH7721 Group
Figure 18.4 shows an example of the operation for transmission in asynchronous mode.
• Transmit data stop function
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010
Transmit data
TxD
When the value of the SCTDSR register and the number of transmit data match, transmit
operation stops. Setting the TSIE bit (interrupt enable bit) allows the generation of an interrupt
and activation of DMAC.
Figure 18.5 shows an example of the operation for transmit data stop function.
TSF flag
interrupt request
Transmit-FIFO-
data-empty
TEND
TDFE
Start
bit
Serial
data
0
Figure 18.5 Example of Transmit Data Stop Function
1
D0
(Example with 8-Bit Data, Parity, One Stop Bit)
Figure 18.4 Example of Transmit Operation
Start
cleared to 0 by Transmit-
D1
bit
0
SCFTDR and TDFE
flag read as 1 then
FIFO-data-empty
interrupt handler
Data written to
D
0
D
D6
One frame
1
Data
D7
D
7
Parity
bit
Parity
interrupt request
0/1
Transmit-FIFO-
bit
0/1
data-empty
Stop
bit
Stop
bit
1
Section 18 Serial Communication Interface with FIFO (SCIF)
Start
bit
0
D
0
D
1
Data
Start
bit
0
D
7
Parity
D0
bit
0/1
(mark state)
Stop
D1
bit
1
state
Idle
1
Page 621 of 1414
D6
D7
0/1

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