HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 452

SH3-DSP, WITH USB AND LCDC, PB-F

HD6417720BP133BV

Manufacturer Part Number
HD6417720BP133BV
Description
SH3-DSP, WITH USB AND LCDC, PB-F
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417720BP133BV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
133MHz
Connectivity
FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
117
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
SH7720 Group, SH7721 Group
Section 9 Bus State Controller (BSC)
9.5.8
PCMCIA Interface
With this LSI, if address map (2) is selected using the MAP bit in CMNCR, the PCMCIA
interface can be specified in areas 5 and 6. Areas 5 and 6 in the physical space can be used for the
IC memory card and I/O card interface defined in the JEIDA specifications version 4.2
(PCMCIA2.1 Rev. 2.1) by specifying the TYPE[3:0] bits of CSnBCR (n = 5B, 6B) to B'0101. In
addition, the SA[1:0] bits of CSnWCR (n = 5B, 6B) assign the upper or lower 32 Mbytes of each
area to an IC memory card or I/O card interface. For example, if the SA1 and SA0 bits of the
CS5BWCR are set to 1 and cleared to 0, respectively, the upper 32 Mbytes and the lower 32
Mbytes of area 5B are used as an IC memory card interface and I/O card interface, respectively.
When the PCMCIA interface is used, the bus size must be specified as 8 bits or 16 bits using the
BSZ[1:0] bits in CS5BBCR or CS6BBCR.
Figure 9.37 shows an example of a connection between this LSI and the PCMCIA card. To enable
insertion and removal of the PCMCIA card during system power-on, a three-state buffer must be
connected between the LSI and the PCMCIA card.
In the JEIDA and PCMCIA standards, operation in the big endian mode is not clearly defined.
Consequently, an original definition is provided for the PCMCIA interface in big endian mode in
this LSI.
Page 392 of 1414
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010

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