HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 752

• Manufacturer Part Number: HD6417720BP133BV
• Description: SH3-DSP, WITH USB AND LCDC, PB-F
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417720BP133BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 117
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 21 Serial I/O with FIFO (SIOF)
21.3.6
SIRCR is a 32-bit readable/writable register that stores receive control data of the SIOF. SIRCR
can be specified only when the FL bit in SIMDR is specified as 1xxx (x: Don't care.).
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Bit
31 to 16
15 to 0
Receive Control Data Register (SIRCR)
Bit Name
SIRC0
15 to 0
SIRC1
15 to 0
Initial
Value
All 0
All 0
R/W
R/W
R/W
Description
Control Channel 0 Receive Data
Store data received from the SIOFRxD pin as control
channel 0 receive data. The position of the control
channel 0 data in the transmit or receive frame is
specified by the CD0A bit in SICDAR.
•
Control Channel 1 Receive Data
Store data received from the SIOFRxD pin as control
channel 1 receive data. The position of the control
channel 1 data in the transmit or receive frame is
specified by the CD1A bit in SICDAR.
•
These bits are valid only when the CD0E bit in
SICDAR is set to 1.
These bits are valid only when the CD1E bit in
SICDAR is set to 1.
SH7720 Group, SH7721 Group
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010