HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 544

SH3-DSP, WITH USB AND LCDC, PB-F

HD6417720BP133BV

Manufacturer Part Number
HD6417720BP133BV
Description
SH3-DSP, WITH USB AND LCDC, PB-F
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417720BP133BV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
133MHz
Connectivity
FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
117
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Section 13 Power-Down Modes
Page 484 of 1414
Bit
5
4
3
2
1
0
Bit Name
MSTP8
MSTP7
MSTP6
MSTP5
MSTP3
Initial
Value
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R
R/W
Description
Module Stop Bit 8
When the MSTP8 bit is set to 1, the supply of the clock to
the DMAC is halted.
0: DMAC operates
1: Clock supply to DMAC halted
Module Stop Bit 7
When the MSTP7 bit is set to 1, the supply of the clock to
the DSP is halted.
0: DSP operates
1: Clock supply to DSP halted
Module Stop Bit 6
When the MSTP6 bit is set to 1, the supply of the clock to
the TLB is halted.
0: TLB operates
1: Clock supply to TLB halted
Module Stop Bit 5
When the MSTP5 bit is set to 1, the supply of the clock to
the cache memory is halted.
0: Cache memory operates
1: Clock supply to cache memory halted
Reserved
This bit is always read as 0. The write value should
always be 0.
Module Stop Bit 3
When the MSTP3 bit is set to 1, the supply of the clock to
the X/Y memory is halted.
0: X/Y memory operates
1: Clock supply to X/Y memory halted
SH7720 Group, SH7721 Group
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010

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