HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 1277

• Manufacturer Part Number: HD6417720BP133BV
• Description: SH3-DSP, WITH USB AND LCDC, PB-F
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417720BP133BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 117
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

SH7720 Group, SH7721 Group
This LSI incorporates a user debugging interface (H-UDI) and advanced user debugger (AUD) for
a boundary scan function and emulator support.
This section describes the H-UDI. The AUD is a function exclusively for use by an emulator.
Refer to the User's Manual for the relevant emulator for details of the AUD.
36.1
The H-UDI is a serial I/O interface which supports JTAG (Joint Test Action Group, IEEE
Standard 1149.1 and IEEE Standard Test Access Port and Boundary-Scan Architecture)
specifications.
The H-UDI in this LSI supports a boundary scan mode, and is also used for emulator connection.
When using an emulator, H-UDI functions should not be used. Refer to the emulator manual for
the method of connecting the emulator.
Figure 36.1 shows a block diagram of the H-UDI.
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010
Features
Section 36 User Debugging Interface (H-UDI)
TRST
TDO
TMS
TCK
TDI
[Legend]
SDBPR: Bypass register
SDBSR: Boundary scan register
SDIR:
SDID:
Instruction register
ID register
Figure 36.1 Block Diagram of H-UDI
TAP controller
SDBPR
MUX
Section 36 User Debugging Interface (H-UDI)
Decoder
SDIR
SDID
Local
bus
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