HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 314

• Manufacturer Part Number: HD6417720BP133BV
• Description: SH3-DSP, WITH USB AND LCDC, PB-F
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417720BP133BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 117
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 8 Interrupt Controller (INTC)
8.3.6
IRR2 is an 8-bit register that indicates whether interrupt requests from the SSL and LCDC are
generated. This register is initialized to H'00 by a power-on reset or manual reset, but is not
initialized in standby mode.
Note: On the models not having the SSL, the SSL-related bits are reserved. The write value
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Bit
7 to 5
4
3 to 1
0
should always be 0.
Interrupt Request Register 2 (IRR2)
⎯
SSLIR
⎯
LCDIR
Bit Name
Initial Value
All 0
0
All 0
0
R
R
R/W
R/W
R/W
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
SSLI Interrupt Request
Indicates whether the SSLI (SSL) interrupt
request is generated.
0: SSLI interrupt request is not generated
1: SSLI interrupt request is generated
Note: On the models not having the SSL, this bit
Reserved
These bits are always read as 0. The write value
should always be 0.
LCDCI Interrupt Request
Indicates whether the LCDCI (LCDC) interrupt
request is generated.
0: LCDCI interrupt request is not generated
1: LCDCI interrupt request is generated
is reserved and always read as 0. The write
value should always be 0.
SH7720 Group, SH7721 Group
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010