HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 784

SH3-DSP, WITH USB AND LCDC, PB-F

HD6417720BP133BV

Manufacturer Part Number
HD6417720BP133BV
Description
SH3-DSP, WITH USB AND LCDC, PB-F
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417720BP133BV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
133MHz
Connectivity
FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
117
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Section 21 Serial I/O with FIFO (SIOF)
(4)
Figure 21.12 shows an example of settings and operation for slave mode reception.
Page 724 of 1414
No.
5
2
4
6
1
3
Reception in Slave Mode
Store SIOFRXD receive data in SIRDR
SIRDAR, SICDAR, and SIFCTR
Clear the RXE bit in SICTR to 0
synchronously with SIOFSYNC
Set the RXE bit in SICTR to 1
Set SIMDR, SISCR, SITDAR,
Figure 21.12 Example of Receive Operation in Slave Mode
RDREQ = 1?
Read SIRDR
Flow Chart
Transfer
ended?
Start
End
Yes
Yes
No
No
Set operating mode, serial clock,
slot positions for transmit/receive
data, slot position for control data,
and FIFO request threshold value
Set to enable reception
Read receive data
Set to disable reception
SIOF Settings
Issue receive transfer request
according to the receive
FIFO threshold value
Enable reception when the
frame synchronous signal is
input
Reception
SH7720 Group, SH7721 Group
End reception
R01UH0083EJ0400 Rev. 4.00
SIOF Operation
Sep 21, 2010

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