HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 265

• Manufacturer Part Number: HD6417720BP133BV
• Description: SH3-DSP, WITH USB AND LCDC, PB-F
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417720BP133BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 117
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

SH7720 Group, SH7721 Group
5.3
5.3.1
If the cache is enabled (the CE bit in CCR1 = 1), whenever instructions or data in spaces P0, P1,
P3, and U0 are accessed the cache will be searched to see if the desired instruction or data is in the
cache. Figure 5.2 illustrates the method by which the cache is searched. The cache is a physical
cache and holds physical addresses in its address section. The example of operation in 16-kbyte
mode is described below:
Entries are selected using bits 11 to 4 of the address (virtual) of the access to memory and the tag
address of that entry is read. In parallel with reading the tag address, the virtual address is
converted into the physical address. The virtual address of the access to memory and the physical
address (tag address) read from the address array are compared. The address comparison uses all
four ways. When the comparison shows a match and the selected entry is valid (V = 1), a cache hit
occurs. When the comparison does not show a match or the selected entry is not valid (V = 0), a
cache miss occurs. Figure 5.2 shows a hit on way 1.
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010
Operation
Searching the Cache
Section 5 Cache
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