HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 1065

SH3-DSP, WITH USB AND LCDC, PB-F

HD6417720BP133BV

Manufacturer Part Number
HD6417720BP133BV
Description
SH3-DSP, WITH USB AND LCDC, PB-F
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417720BP133BV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
133MHz
Connectivity
FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
117
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
SH7720 Group, SH7721 Group
30.3.13 Sampling Register (SCSMPL)
SCSMPL is a 16-bit readable/writable register that sets the number of serial clock cycles per etu.
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010
Bit
15 to 11
10 to 0
Bit Name
SCSMPL10
to
SCSMPL0
Initial
Value
All 0
H'173
R/W
R
R/W
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Setting for Number of Serial Clock Cycles per Etu
The number of serial clock cycles per etu is (SCSMPL
value + 1). The value written to SCSMPL should always
be H'0007 or greater.
Section 30 SIM Card Module (SIM)
Page 1005 of 1414

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