HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 485

SH3-DSP, WITH USB AND LCDC, PB-F

HD6417720BP133BV

Manufacturer Part Number
HD6417720BP133BV
Description
SH3-DSP, WITH USB AND LCDC, PB-F
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417720BP133BV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
133MHz
Connectivity
FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
117
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
SH7720 Group, SH7721 Group
Figure 10.2 shows a flowchart of this procedure.
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010
Notes: 1. In auto-request mode, transfer begins when the NMIF, AE, and TE bits are all 0 and the DE and
(SAR, DAR, DMATCR, CHCR, DMAOR, DMARS)
DMATCR – 1 → DMATCR, SAR and DAR
2. DREQ = level detection in burst mode (external request) or cycle-steal mode.
3. DREQ = edge detection in burst mode (external request), or auto-request mode in burst mode.
DEI interrupt request (when IE = 1)
DME bits are set to 1.
or AE = 1 or DE = 0
NMIF, AE, TE = 0?
Transfer (1 transfer unit);
DE, DME = 1 and
Transfer request
DMATCR = 0?
or DME = 0?
Yes
Transfer end
Yes
Initial settings
Yes
occurs?*
Yes
NMIF = 1
TE = 1
Start
updated
Figure 10.2 DMA Transfer Flowchart
1
No
No
No
No
or AE = 1 or DE = 0
Transfer aborted
or DME = 0?
Normal end
Yes
NMIF = 1
*
3
Section 10 Direct Memory Access Controller (DMAC)
DREQ detection selection
transfer request mode,
Bus mode,
system
No
*
2
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