ATMEGA128-16AU Atmel, ATMEGA128-16AU Datasheet - Page 85

• Manufacturer Part Number: ATMEGA128-16AU
• Description: IC AVR MCU 128K 16MHZ 5V 64TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA128-16AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: 2-Wire, JTAG, SPI, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 4
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Controller Family/series: AVR MEGA
• No. Of I/o's: 53
• Eeprom Memory Size: 4096Byte
• Ram Memory Size: 4KB
• Cpu Speed: 16MHz
• Rohs Compliant: Yes
• For Use With: ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK501 - ADAPTER KIT FOR 64PIN AVR MCUATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Port C Input Pins Address –
PINC
Port D Data Register – PORTD
Port D Data Direction Register
– DDRD
Port D Input Pins Address –
PIND
Port E Data Register – PORTE
Port E Data Direction Register
– DDRE
Port E Input Pins Address –
PINE
Port F Data Register – PORTF
2467M–AVR–11/04
In ATmega103 compatibility mode, DDRC and PINC Registers are initialized to being
Push-Pull Zero Output. The port pins assumes their initial value, even if the clock is not
running. Note that the DDRC and PINC Registers are available in ATmega103 compat-
ibility mode, and should not be used for 100% back-ward compatibility.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
PORTD7
PORTE7
PORTF7
PINC7
PIND7
PINE7
DDD7
DDE7
R/W
R/W
R/W
R/W
R/W
N/A
N/A
N/A
R
R
R
7
7
0
7
0
7
7
0
7
0
7
7
0
PORTD6
PORTE6
PORTF6
PINC6
PIND6
PINE6
DDD6
DDE6
R/W
R/W
R/W
R/W
R/W
N/A
N/A
N/A
R
R
R
6
6
0
6
0
6
6
0
6
0
6
6
0
PORTD5
PORTE5
PORTF5
PINC5
PIND5
PINE5
DDD5
DDE5
R/W
R/W
R/W
R/W
R/W
N/A
N/A
N/A
R
R
R
5
5
0
5
0
5
5
0
5
0
5
5
0
PORTD4
PORTE4
PORTF4
PINC4
PIND4
PINE4
DDD4
DDE4
R/W
R/W
R/W
R/W
R/W
N/A
N/A
N/A
R
R
R
4
4
0
4
0
4
4
0
4
0
4
4
0
PORTD3
PORTE3
PORTF3
PINC3
PIND3
PINE3
DDD3
DDE3
R/W
R/W
R/W
R/W
R/W
N/A
N/A
N/A
3
R
3
0
3
0
3
R
3
0
3
0
3
R
3
0
PORTD2
PORTE2
PORTF2
PINC2
PIND2
PINE2
DDD2
DDE2
R/W
R/W
R/W
R/W
R/W
N/A
N/A
N/A
R
R
R
2
2
0
2
0
2
2
0
2
0
2
2
0
PORTD1
PORTE1
PORTF1
PINC1
PIND1
PINE1
DDD1
DDE1
ATmega128
R/W
R/W
R/W
R/W
R/W
N/A
N/A
N/A
R
R
R
1
1
0
1
0
1
1
0
1
0
1
1
0
PORTD0
PORTE0
PORTF0
PINC0
PIND0
PINE0
DDD0
DDE0
R/W
R/W
R/W
R/W
R/W
N/A
N/A
N/A
R
R
R
0
0
0
0
0
0
0
0
0
0
0
0
0
PORTD
PORTE
PORTF
DDRD
DDRE
PINC
PIND
PINF
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