ATMEGA128-16AU Atmel, ATMEGA128-16AU Datasheet - Page 47

• Manufacturer Part Number: ATMEGA128-16AU
• Description: IC AVR MCU 128K 16MHZ 5V 64TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA128-16AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: 2-Wire, JTAG, SPI, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 4
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Controller Family/series: AVR MEGA
• No. Of I/o's: 53
• Eeprom Memory Size: 4096Byte
• Ram Memory Size: 4KB
• Cpu Speed: 16MHz
• Rohs Compliant: Yes
• For Use With: ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK501 - ADAPTER KIT FOR 64PIN AVR MCUATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

System Control and
Reset
Resetting the AVR
Reset Sources
2467M–AVR–11/04
During Reset, all I/O registers are set to their initial values, and the program starts exe-
cution from the Reset Vector. The instruction placed at the Reset Vector must be a JMP
– absolute jump – instruction to the reset handling routine. If the program never enables
an interrupt source, the interrupt vectors are not used, and regular program code can be
placed at these locations. This is also the case if the Reset Vector is in the Application
section while the interrupt vectors are in the Boot section or vice versa. The circuit dia-
gram in Figure 22 shows the reset logic. Table 19 defines the electrical parameters of
the reset circuitry.
The I/O ports of the AVR are immediately reset to their initial state when a reset source
goes active. This does not require any clock source to be running.
After all reset sources have gone inactive, a delay counter is invoked, stretching the
internal reset. This allows the power to reach a stable level before normal operation
starts. The time-out period of the delay counter is defined by the user through the
CKSEL fuses. The different selections for the delay period are presented in “Clock
Sources” on page 35.
The ATmega128 has five sources of reset:
•
•
•
•
•
Power-on Reset. The MCU is reset when the supply voltage is below the Power-on
Reset threshold (V
External Reset. The MCU is reset when a low level is present on the RESET pin for
longer than the minimum pulse length.
Watchdog Reset. The MCU is reset when the Watchdog Timer period expires and
the Watchdog is enabled.
Brown-out Reset. The MCU is reset when the supply voltage V
Brown-out Reset threshold (V
JTAG AVR Reset. The MCU is reset as long as there is a logic one in the Reset
Register, one of the scan chains of the JTAG system. Refer to the section “IEEE
1149.1 (JTAG) Boundary-scan” on page 254 for details.
POT
).
BOT
) and the Brown-out Detector is enabled.
ATmega128
CC
is below the
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