ATMEGA128-16AU Atmel, ATMEGA128-16AU Datasheet - Page 152

IC AVR MCU 128K 16MHZ 5V 64TQFP

ATMEGA128-16AU

Manufacturer Part Number
ATMEGA128-16AU
Description
IC AVR MCU 128K 16MHZ 5V 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA128-16AU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Processor Series
ATMEGA128x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
2-Wire, JTAG, SPI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
53
Number Of Timers
4
Operating Supply Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Controller Family/series
AVR MEGA
No. Of I/o's
53
Eeprom Memory Size
4096Byte
Ram Memory Size
4KB
Cpu Speed
16MHz
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK501 - ADAPTER KIT FOR 64PIN AVR MCUATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA128-16AU
Manufacturer:
MITSUBISHI
Quantity:
104
Part Number:
ATMEGA128-16AU
Manufacturer:
ATMEL
Quantity:
3 340
Part Number:
ATMEGA128-16AU
Quantity:
2 673
Part Number:
ATMEGA128-16AU
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
ATMEGA128-16AU
Manufacturer:
ATMEL
Quantity:
2 832
Part Number:
ATMEGA128-16AU
Manufacturer:
ATMEL
Quantity:
525
Part Number:
ATMEGA128-16AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
ATMEGA128-16AU
Quantity:
3 000
Part Number:
ATMEGA128-16AUR
Manufacturer:
Atmel
Quantity:
10 000
Phase Correct PWM Mode
152
ATmega128
The phase correct PWM mode (WGM21:0 = 1) provides a high resolution phase correct
PWM waveform generation option. The phase correct PWM mode is based on a dual-
slope operation. The counter counts repeatedly from BOTTOM to MAX and then from
MAX to BOTTOM. In non-inverting Compare Output mode, the output compare (OC2) is
cleared on the compare match between TCNT2 and OCR2 while counting up, and set
on the compare match while downcounting. In inverting Output Compare mode, the
operation is inverted. The dual-slope operation has lower maximum operation frequency
than single slope operation. However, due to the symmetric feature of the dual-slope
PWM modes, these modes are preferred for motor control applications.
The PWM resolution for the phase correct PWM mode is fixed to 8 bits. In phase correct
PWM mode the counter is incremented until the counter value matches Max When the
counter reaches MAX, it changes the count direction. The TCNT2 value will be equal to
MAX for one timer clock cycle. The timing diagram for the phase correct PWM mode is
shown on Figure 67. The TCNT2 value is in the timing diagram shown as a histogram
for illustrating the dual-slope operation. The diagram includes non-inverted and inverted
PWM outputs. The small horizontal line marks on the TCNT2 slopes represent compare
matches between OCR2 and TCNT2.
Figure 67. Phase Correct PWM Mode, Timing Diagram
The Timer/Counter Overflow Flag (TOV2) is set each time the counter reaches BOT-
TOM. The interrupt flag can be used to generate an interrupt each time the counter
reaches the BOTTOM value.
In phase correct PWM mode, the compare unit allows generation of PWM waveforms on
the OC2 pin. Setting the COM21:0 bits to 2 will produce a non-inverted PWM. An
inverted PWM output can be generated by setting the COM21:0 to 3 (see Table 67 on
page 157). The actual OC2 value will only be visible on the port pin if the data direction
for the port pin is set as output. The PWM waveform is generated by clearing (or setting)
the OC2 Register at the compare match between OCR2 and TCNT2 when the counter
increments, and setting (or clearing) the OC2 Register at compare match between
TCNTn
OCn
OCn
Period
1
2
3
(COMn1:0 = 2)
(COMn1:0 = 3)
OCn Interrupt Flag Set
OCRn Update
TOVn Interrupt Flag Set
2467M–AVR–11/04

Related parts for ATMEGA128-16AU