ATMEGA128-16AU Atmel, ATMEGA128-16AU Datasheet - Page 239

IC AVR MCU 128K 16MHZ 5V 64TQFP

ATMEGA128-16AU

Manufacturer Part Number
ATMEGA128-16AU
Description
IC AVR MCU 128K 16MHZ 5V 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA128-16AU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Processor Series
ATMEGA128x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
2-Wire, JTAG, SPI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
53
Number Of Timers
4
Operating Supply Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Controller Family/series
AVR MEGA
No. Of I/o's
53
Eeprom Memory Size
4096Byte
Ram Memory Size
4KB
Cpu Speed
16MHz
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK501 - ADAPTER KIT FOR 64PIN AVR MCUATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Offset Compensation
Schemes
2467M–AVR–11/04
Figure 114. ADC Power Connections
The gain stage has a built-in offset cancellation circuitry that nulls the offset of differen-
tial measurements as much as possible. The remaining offset in the analog path can be
measured directly by selecting the same channel for both differential inputs. This offset
residue can be then subtracted in software from the measurement results. Using this
kind of software based offset correction, offset on any channel can be reduced below
one LSB.
4. If any ADC port pins are used as digital outputs, it is essential that these do
not switch while a conversion is in progress.
100nF
(ADC7) PF7
(ADC6) PF6
(ADC5) PF5
(ADC4) PF4
(ADC3) PF3
(ADC2) PF2
(ADC1) PF1
(ADC0) PF0
(AD0) PA0
AVCC
AREF
GND
GND
VCC
51
52
53
54
55
56
57
58
59
60
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62
62
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63
64
64
1
ATmega128
239

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