ATMEGA128-16AU Atmel, ATMEGA128-16AU Datasheet - Page 381

• Manufacturer Part Number: ATMEGA128-16AU
• Description: IC AVR MCU 128K 16MHZ 5V 64TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA128-16AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: 2-Wire, JTAG, SPI, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 4
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Controller Family/series: AVR MEGA
• No. Of I/o's: 53
• Eeprom Memory Size: 4096Byte
• Ram Memory Size: 4KB
• Cpu Speed: 16MHz
• Rohs Compliant: Yes
• For Use With: ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK501 - ADAPTER KIT FOR 64PIN AVR MCUATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Changes from Rev.
2467D-03/02 to Rev.
2467E-04/02
Changes from Rev.
2467C-02/02 to Rev.
2467D-03/02
2467M–AVR–11/04
7. Corrected typo (WGM-bit setting) for:
8. Corrected Table 81 on page 192 (USART).
9. Corrected Table 102 on page 261 (Boundary-Scan)
10. Updated Vil parameter in “DC Characteristics” on page 321.
1. Updated the Characterization Data in Section “ATmega128 Typical Character-
2. Updated the following tables:
3. Updated Description of OSCCAL Calibration Byte.
1. Added more information about “ATmega103 Compatibility Mode” on page 5.
2. Updated Table 2, “EEPROM Programming Time,” on page 21.
3. Updated typical Start-up Time in Table 7 on page 35, Table 9 and Table 10 on
4. Updated Table 22 on page 54 with typical WDT Time-out.
5. Corrected description of ADSC bit in “ADC Control and Status Register A –
6. Improved description on how to do a polarity check of the ADC differential
7. Corrected JTAG version numbers in “JTAG Version Numbers” on page 256.
8. Improved description of addressing during SPM (usage of RAMPZ) on
9. Added not regarding OCDEN Fuse below Table 118 on page 290.
10. Updated Programming Figures:
“Fast PWM Mode” on page 96 (Timer/Counter0).
“Phase Correct PWM Mode” on page 98 (Timer/Counter0).
“Fast PWM Mode” on page 150 (Timer/Counter2).
“Phase Correct PWM Mode” on page 152 (Timer/Counter2).
istics” on page 335.
Table 19 on page 48, Table 20 on page 52, Table 68 on page 157, Table 102 on
page 261, and Table 136 on page 328.
In the data sheet, it was not explained how to take advantage of the calibration
bytes for 2, 4, and 8 MHz Oscillator selections. This is now added in the following
sections:
Improved description of “Oscillator Calibration Register – OSCCAL” on page 39 and
“Calibration Byte” on page 291.
page 37, Table 12 on page 38, Table 14 on page 39, and Table 16 on page 40.
ADCSRA” on page 245.
results in “ADC Conversion Result” on page 242.
“Addressing the Flash During Self-Programming” on page 280, “Performing
Page Erase by SPM” on page 282, and “Performing a Page Write” on page
282.
ATmega128
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